c4b70276ed
Change-Id: I8a207e30a73d10fe67c0474ff11324ae99e2cec6 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41360 Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
131 lines
3.2 KiB
Plaintext
131 lines
3.2 KiB
Plaintext
## SPDX-License-Identifier: GPL-2.0-only
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config INTEL_DDI
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bool
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default n
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help
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helper functions for intel DDI operations
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config INTEL_EDID
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bool
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default n
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config INTEL_INT15
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bool
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default n
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config INTEL_GMA_ACPI
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bool
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default n
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config INTEL_GMA_BCLV_OFFSET
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hex
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default 0xc8254
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config INTEL_GMA_BCLV_WIDTH
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int
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default 16
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config INTEL_GMA_BCLM_OFFSET
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hex
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default 0xc8256
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config INTEL_GMA_BCLM_WIDTH
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int
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default 16
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config INTEL_GMA_SSC_ALTERNATE_REF
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bool
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default n
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help
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Set when the SSC reference clock for LVDS runs at a different fre-
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quency than the general display reference clock.
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To be set by northbridge or mainboard Kconfig. For most platforms,
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there is no choice, i.e. for i945 and gm45 the SSC reference always
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differs from the display reference clock (i945: 66Mhz SSC vs. 48MHz
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DREF; gm45: 100MHz SSC vs. 96Mhz DREF), for Arrandale and newer, it's
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the same frequency for SSC/non-SSC (120MHz). The only, currently
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supported platform with a choice seems to be Pineview, where the
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alternative is 100MHz vs. the default 96MHz.
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config INTEL_GMA_SWSMISCI
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bool
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default n
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help
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Select this option for Atom-based platforms which use the SWSMISCI
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register (0xe0) rather than the SWSCI register (0xe8).
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config INTEL_GMA_LIBGFXINIT_EDID
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bool
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config GFX_GMA_ANALOG_I2C_HDMI_B
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bool
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config GFX_GMA_ANALOG_I2C_HDMI_C
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bool
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config GFX_GMA_ANALOG_I2C_HDMI_D
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bool
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config GFX_GMA
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def_bool y
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depends on NORTHBRIDGE_INTEL_GM45 || NORTHBRIDGE_INTEL_X4X \
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|| NORTHBRIDGE_INTEL_IRONLAKE || NORTHBRIDGE_INTEL_SANDYBRIDGE \
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|| NORTHBRIDGE_INTEL_HASWELL \
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|| SOC_INTEL_BROADWELL || SOC_INTEL_SKYLAKE || SOC_INTEL_APOLLOLAKE \
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|| SOC_INTEL_KABYLAKE || SOC_INTEL_COFFEELAKE \
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|| SOC_INTEL_WHISKEYLAKE
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depends on MAINBOARD_USE_LIBGFXINIT || INTEL_GMA_LIBGFXINIT_EDID
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select RAMSTAGE_LIBHWBASE
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config GFX_GMA_PANEL_1_ON_EDP
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bool
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depends on GFX_GMA || MAINBOARD_HAS_LIBGFXINIT
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default n if GFX_GMA_PANEL_1_ON_LVDS
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default y
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config GFX_GMA_PANEL_1_ON_LVDS
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bool
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depends on GFX_GMA || MAINBOARD_HAS_LIBGFXINIT
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default y if NORTHBRIDGE_INTEL_GM45 || NORTHBRIDGE_INTEL_IRONLAKE
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default n
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if GFX_GMA
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config GFX_GMA_DYN_CPU
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def_bool y
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help
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Activates runtime CPU detection in libgfxinit.
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config GFX_GMA_GENERATION
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string
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default "Broxton" if SOC_INTEL_APOLLOLAKE
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default "Skylake" if SOC_INTEL_SKYLAKE || SOC_INTEL_KABYLAKE || \
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SOC_INTEL_COFFEELAKE || SOC_INTEL_WHISKEYLAKE
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default "Haswell" if NORTHBRIDGE_INTEL_HASWELL || SOC_INTEL_BROADWELL
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default "Ironlake" if NORTHBRIDGE_INTEL_IRONLAKE || NORTHBRIDGE_INTEL_SANDYBRIDGE
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default "G45" if NORTHBRIDGE_INTEL_GM45 || NORTHBRIDGE_INTEL_X4X
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config GFX_GMA_PANEL_1_PORT
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string
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default "eDP" if GFX_GMA_PANEL_1_ON_EDP
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default "LVDS"
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config GFX_GMA_PANEL_2_PORT
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string
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default "Disabled"
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config GFX_GMA_ANALOG_I2C_PORT
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string
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default "PCH_HDMI_B" if GFX_GMA_ANALOG_I2C_HDMI_B
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default "PCH_HDMI_C" if GFX_GMA_ANALOG_I2C_HDMI_C
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default "PCH_HDMI_D" if GFX_GMA_ANALOG_I2C_HDMI_D
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default "PCH_DAC"
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help
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Boards with a DVI-I connector share the I2C pins for both analog and
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digital displays. In that case, the EDID for a VGA display has to be
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read over the I2C interface of the coupled digital port.
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endif
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