c557847a9e
Just as in commit 38569d0610: ("mb/lenovo/{x230, x230s}: Disable
SuperSpeed capabilities for WWAN USB")
Although on ThinkPads with Panther Point PCH the usb port inside wwan
socket is usually wired to XHCI, it has actually no SuperSpeed lines,
so maybe it is okay to disable SuperSpeed capabilities, and wire them
to EHCI #2 by making use of XUSB2PRM and USB3PRM.
Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Change-Id: I61e61283a821686558f7f3fdfac7073bb3557e93
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78680
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
152 lines
5.1 KiB
Plaintext
152 lines
5.1 KiB
Plaintext
chip northbridge/intel/sandybridge
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register "gfx" = "GMA_STATIC_DISPLAYS(1)"
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# Enable DisplayPort Hotplug with 6ms pulse
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register "gpu_dp_d_hotplug" = "0x06"
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# Enable Panel as LVDS and configure power delays
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register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
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register "gpu_panel_power_cycle_delay" = "6" # T7: 500ms
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register "gpu_panel_power_up_delay" = "100" # T1+T2: 10ms
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register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms
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register "gpu_panel_power_backlight_on_delay" = "2100" # T3: 210ms
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register "gpu_panel_power_backlight_off_delay" = "2100" # T4: 210ms
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register "gpu_cpu_backlight" = "0x1155"
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register "gpu_pch_backlight" = "0x11551155"
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device domain 0 on
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subsystemid 0x17aa 0x21f3 inherit
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chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
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register "docking_supported" = "1"
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register "gen1_dec" = "0x000c15e1"
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register "gen2_dec" = "0x007c1601"
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register "gen3_dec" = "0x000c06a1"
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register "gpi13_routing" = "2"
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register "gpi1_routing" = "2"
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register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
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register "pcie_port_coalesce" = "true"
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register "sata_interface_speed_support" = "0x3"
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register "sata_port_map" = "0x17"
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# Do not enable xHCI Port 4 since WWAN USB is EHCI-only
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register "superspeed_capable_ports" = "0x7"
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register "xhci_switchable_ports" = "0x7"
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register "xhci_overcurrent_mapping" = "0x04000201"
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# device specific SPI configuration
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register "spi_uvscc" = "0x2005"
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register "spi_lvscc" = "0x2005"
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device ref xhci on end # USB 3.0 Controller
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device ref mei1 on end # Management Engine Interface 1
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device ref mei2 off end # Management Engine Interface 2
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device ref me_ide_r off end # Management Engine IDE-R
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device ref me_kt off end # Management Engine KT
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device ref gbe on end # Intel Gigabit Ethernet
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device ref ehci2 on end # USB2 EHCI #2
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device ref hda on end # High Definition Audio controller
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device ref pcie_rp1 on # PCIe Port #1
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chip drivers/ricoh/rce822 # Ricoh cardreader
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register "disable_mask" = "0x87"
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register "sdwppol" = "1"
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device pci 00.0 on end # Ricoh SD card reader
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end
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end
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device ref pcie_rp2 on end # PCIe Port #2
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device ref pcie_rp3 on # PCIe Port #3
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smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
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end
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device ref pcie_rp4 off end # PCIe Port #4
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device ref pcie_rp5 off end # PCIe Port #5
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device ref pcie_rp6 off end # PCIe Port #6
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device ref pcie_rp7 off end # PCIe Port #7
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device ref pcie_rp8 off end # PCIe Port #8
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device ref ehci1 on end # USB2 EHCI #1
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device ref pci_bridge off end # PCI bridge
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device ref lpc on # LPC bridge PCI-LPC bridge
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chip ec/lenovo/pmh7
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register "backlight_enable" = "true"
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register "dock_event_enable" = "true"
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device pnp ff.1 on end # dummy
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end
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chip ec/lenovo/h8
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device pnp ff.2 on # dummy
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io 0x60 = 0x62
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io 0x62 = 0x66
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io 0x64 = 0x1600
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io 0x66 = 0x1604
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end
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register "config0" = "0xa7"
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register "config1" = "0x01"
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register "config2" = "0xa0"
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register "config3" = "0xe2"
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register "has_keyboard_backlight" = "0"
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register "beepmask0" = "0x02"
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register "beepmask1" = "0x86"
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register "has_power_management_beeps" = "1"
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register "event2_enable" = "0xff"
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register "event3_enable" = "0xff"
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register "event4_enable" = "0xf0"
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register "event5_enable" = "0x3c"
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register "event6_enable" = "0x00"
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register "event7_enable" = "0xa1"
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register "event8_enable" = "0x7b"
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register "event9_enable" = "0xff"
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register "eventa_enable" = "0x00"
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register "eventb_enable" = "0x00"
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register "eventc_enable" = "0xff"
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register "eventd_enable" = "0xff"
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register "evente_enable" = "0x0d"
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register "has_bdc_detection" = "1"
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register "bdc_gpio_num" = "54"
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register "bdc_gpio_lvl" = "0"
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register "has_wwan_detection" = "1"
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register "wwan_gpio_num" = "70"
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register "wwan_gpio_lvl" = "0"
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end
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chip drivers/lenovo/hybrid_graphics
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device pnp ff.f on end # dummy
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register "detect_gpio" = "21"
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register "has_panel_hybrid_gpio" = "1"
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register "panel_hybrid_gpio" = "52"
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register "panel_integrated_lvl" = "1"
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register "has_backlight_gpio" = "0"
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register "has_dgpu_power_gpio" = "0"
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register "has_thinker1" = "1"
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end
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chip drivers/pc80/tpm
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device pnp 0c31.0 on end
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end
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end
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device ref sata1 on end # SATA Controller 1
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device ref smbus on # SMBus
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chip drivers/i2c/at24rf08c # eeprom, 8 virtual devices, same chip
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device i2c 54 on end
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device i2c 55 on end
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device i2c 56 on end
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device i2c 57 on end
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device i2c 5c on end
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device i2c 5d on end
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device i2c 5e on end
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device i2c 5f on end
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end
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end
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device ref sata2 off end # SATA Controller 2
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device ref thermal off end # Thermal
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end
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device ref host_bridge on end # Host bridge Host bridge
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device ref peg10 on end # PCIe Bridge for discrete graphics
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device ref igd on end # Internal graphics VGA controller
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device ref dev4 off end # Signal processing controller
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end
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end
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