c56c723deb
Most boards use `device lapic 0 on` with zero written in decimal. For the sake of consistency, update the remaining boards to follow suit. Change-Id: I1d3b1ac107e33aae11189cdd5e719b8e48b10f08 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54359 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
114 lines
4.4 KiB
Plaintext
114 lines
4.4 KiB
Plaintext
chip northbridge/intel/sandybridge
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device cpu_cluster 0 on
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chip cpu/intel/model_206ax
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register "acpi_c1" = "1"
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register "acpi_c2" = "3"
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register "acpi_c3" = "5"
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device lapic 0 on end
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device lapic 0xacac off end
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end
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end
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device domain 0 on
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subsystemid 0x1462 0x7707 inherit
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device pci 00.0 on end # Host bridge
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device pci 01.0 on end # PCIe Bridge for discrete graphics
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device pci 02.0 off end # Internal graphics
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chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
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register "c2_latency" = "0x0065"
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register "docking_supported" = "0"
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register "gen1_dec" = "0x000c0291"
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register "gen2_dec" = "0x000c0a01"
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register "pcie_port_coalesce" = "1"
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register "sata_interface_speed_support" = "0x3"
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register "sata_port_map" = "0x33"
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register "spi_lvscc" = "0x2005"
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register "spi_uvscc" = "0x2005"
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register "gpe0_en" = "0x28000040"
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device pci 16.0 on end # Management Engine Interface 1
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device pci 16.1 off end # Management Engine Interface 2
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device pci 16.2 off end # Management Engine IDE-R
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device pci 16.3 off end # Management Engine KT
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device pci 19.0 on end # Intel Gigabit Ethernet
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device pci 1a.0 on end # USB2 EHCI #2
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device pci 1b.0 on end # HD Audio controller
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device pci 1c.0 on end # PCIe Port #1
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device pci 1c.1 off end # PCIe Port #2
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device pci 1c.2 off end # PCIe Port #3
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device pci 1c.3 off end # PCIe Port #4
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device pci 1c.4 off end # PCIe Port #5
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device pci 1c.5 off end # PCIe Port #6
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device pci 1c.6 on end # PCIe Port #7
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device pci 1c.7 off end # PCIe Port #8
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device pci 1d.0 on end # USB2 EHCI #1
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device pci 1e.0 off end # PCI bridge
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device pci 1f.0 on # LPC bridge
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chip superio/fintek/f71808a
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register "multi_function_register_0" = "0x00" # 0x28
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register "multi_function_register_1" = "0xc0" # 0x29
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register "multi_function_register_2" = "0x20" # 0x2a
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register "multi_function_register_3" = "0x4f" # 0x2b
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register "multi_function_register_4" = "0x90" # 0x2c
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register "hwm_peci_tsi_ctrl" = "0x02" # 0x0a - PECI enabled, 1.23 V
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register "hwm_tcc_temp" = "0x64" # 0x0c - TCC temperature = 100 °C
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register "hwm_fan1_seg1_speed" = "0xff" # 0xaa - Fan 1 segment 1
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register "hwm_fan1_seg2_speed" = "0xe2" # 0xab - Fan 1 segment 2
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register "hwm_fan1_seg3_speed" = "0xaf" # 0xac - Fan 1 segment 3
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register "hwm_fan1_seg4_speed" = "0x89" # 0xad - Fan 1 segment 4
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register "hwm_fan1_seg5_speed" = "0x72" # 0xae - Fan 1 segment 5
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register "hwm_fan1_temp_src" = "0x10" # 0xaf - Fan 1 source = PECI
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register "hwm_fan2_seg1_speed" = "0xff" # 0xba - Fan 2 segment 1 = 100%
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register "hwm_fan2_seg2_speed" = "0xd9" # 0xbb - Fan 2 segment 2 = 86%
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register "hwm_fan2_seg3_speed" = "0xb2" # 0xbc - Fan 2 segment 3 = 74%
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register "hwm_fan2_seg4_speed" = "0x99" # 0xbd - Fan 2 segment 4 = 62%
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register "hwm_fan2_seg5_speed" = "0x80" # 0xbe - Fan 2 segment 5 = 50%
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register "hwm_fan2_temp_src" = "0x1e" # 0xbf - Fan 2 source = temperature 2
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register "hwm_domain1_en" = "0x01"
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register "hwm_fan1_boundary_hysteresis" = "0x43"
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register "hwm_vt1_boundary_1_temperature" = "0x52" # 82°C
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register "hwm_vt1_boundary_2_temperature" = "0x46" # 70°C
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register "hwm_vt1_boundary_3_temperature" = "0x41" # 65°C
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register "hwm_vt1_boundary_4_temperature" = "0x37" # 55°C
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device pnp 4e.1 off end # Serial Port
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device pnp 4e.4 on # Hardware monitor
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io 0x60 = 0x295
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irq 0x70 = 0
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# global
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irq 0x27 = 0x10 # PWOK follows Intel sequence
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irq 0x2d = 0x2e # Anykey+MouseButton wakeup
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end
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device pnp 4e.5 on # Keyboard
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io 0x60 = 0x060
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irq 0x70 = 1
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irq 0x72 = 12
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end
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device pnp 4e.6 on # GPIO
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irq 0x70 = 0
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irq 0xd0 = 0x20 # GPIO2 Output Enable
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irq 0xd1 = 0x20 # GPIO2 Output Data
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irq 0xd3 = 0x20 # GPIO2 Drive Enable
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end
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device pnp 4e.7 off # WDT
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io 0x60 = 0xa00
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end
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device pnp 4e.8 off end # CIR
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device pnp 4e.a on # PME, ACPI, Power Saving Registers
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irq 0xe2 = 0x0c # EuP control
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irq 0xed = 0xc0 # EuP Watchdog Control
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irq 0xf4 = 0x10 # Keep Last State Select
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irq 0xf9 = 0x09 # LED VSB Mode Select
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end
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end
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end
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device pci 1f.2 on end # SATA Controller 1
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device pci 1f.3 on end # SMBus
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device pci 1f.5 off end # SATA Controller 2
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device pci 1f.6 off end # Thermal
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end
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end
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end
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