Files
system76-coreboot/src/mainboard/intel/adlrvp/Kconfig
Subrata Banik c66733a106 soc/intel/alderlake: Move INTEL_CAR_NEM selection from SoC to mainboard
This patch decouples the selection of eNEM feature enablement from SoC
to ensure the ADLRVP does the validation first prior enabling this
feature on OEM/ODM reference designs.

BUG=b:168820083
TEST=No changing is being observed in .config with and without this CL.

Change-Id: I709185159d9869501b1d8e8d00f6d25ec77838bf
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56993
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-08-19 17:30:16 +00:00

113 lines
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if BOARD_INTEL_ADLRVP_P || BOARD_INTEL_ADLRVP_P_EXT_EC || BOARD_INTEL_ADLRVP_M || BOARD_INTEL_ADLRVP_M_EXT_EC
config BOARD_SPECIFIC_OPTIONS
def_bool y
select ADL_ENABLE_USB4_PCIE_RESOURCES
select BOARD_ROMSIZE_KB_32768
select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select MAINBOARD_HAS_CHROMEOS
select DRIVERS_I2C_HID
select DRIVERS_I2C_GENERIC
select DRIVERS_INTEL_SOUNDWIRE
select DRIVERS_INTEL_DPTF
select DRIVERS_INTEL_PMC if BOARD_INTEL_ADLRVP_P_EXT_EC || BOARD_INTEL_ADLRVP_M_EXT_EC
select DRIVERS_USB_ACPI
select DRIVERS_SPI_ACPI
select SOC_INTEL_ALDERLAKE
select SOC_INTEL_ALDERLAKE_PCH_M if BOARD_INTEL_ADLRVP_M || BOARD_INTEL_ADLRVP_M_EXT_EC
select HAVE_SPD_IN_CBFS
select DRIVERS_SOUNDWIRE_ALC711
select SOC_INTEL_CSE_LITE_SKU
select DRIVERS_I2C_MAX98373
select FW_CONFIG if BOARD_INTEL_ADLRVP_M_EXT_EC
select FW_CONFIG_SOURCE_CHROMEEC_CBI if BOARD_INTEL_ADLRVP_M_EXT_EC
select MAINBOARD_HAS_TPM2 if BOARD_INTEL_ADLRVP_M_EXT_EC
select MAINBOARD_HAS_SPI_TPM_CR50 if BOARD_INTEL_ADLRVP_M_EXT_EC
select SPI_TPM if BOARD_INTEL_ADLRVP_M_EXT_EC
select INTEL_CAR_NEM #TODO - Enable INTEL_CAR_NEM_ENHANCED
config CHROMEOS
select GBB_FLAG_FORCE_DEV_SWITCH_ON
select GBB_FLAG_FORCE_DEV_BOOT_USB
select GBB_FLAG_FORCE_DEV_BOOT_ALTFW
select GBB_FLAG_FORCE_MANUAL_RECOVERY
select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC
select HAS_RECOVERY_MRC_CACHE
config MAINBOARD_DIR
default "intel/adlrvp"
config VARIANT_DIR
default "adlrvp_p" if BOARD_INTEL_ADLRVP_P
default "adlrvp_p_ext_ec" if BOARD_INTEL_ADLRVP_P_EXT_EC
default "adlrvp_m" if BOARD_INTEL_ADLRVP_M
default "adlrvp_m_ext_ec" if BOARD_INTEL_ADLRVP_M_EXT_EC
config GBB_HWID
string
depends on CHROMEOS
default "ADLRVPM" if BOARD_INTEL_ADLRVP_M || BOARD_INTEL_ADLRVP_M_EXT_EC
default "ADLRVPP"
config MAINBOARD_PART_NUMBER
default "Alder Lake Client Platform"
config MAINBOARD_VENDOR
string
default "Intel Corporation"
config MAINBOARD_FAMILY
string
default "Intel_adlrvp"
config DEVICETREE
default "devicetree_m.cb" if BOARD_INTEL_ADLRVP_M || BOARD_INTEL_ADLRVP_M_EXT_EC
default "devicetree.cb"
config OVERRIDE_DEVICETREE
default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
config DIMM_SPD_SIZE
int
default 512
choice
prompt "ON BOARD EC"
default ADL_INTEL_EC if BOARD_INTEL_ADLRVP_P || BOARD_INTEL_ADLRVP_M
default ADL_CHROME_EC if BOARD_INTEL_ADLRVP_P_EXT_EC || BOARD_INTEL_ADLRVP_M_EXT_EC
help
This option allows you to select the on board EC to use.
Select whether the board has Intel EC or Chrome EC
config ADL_CHROME_EC
bool "Chrome EC"
select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_ESPI
select EC_GOOGLE_CHROMEEC_BOARDID
select EC_ACPI
select EC_GOOGLE_CHROMEEC_LPC
config ADL_INTEL_EC
bool "Intel EC"
select EC_ACPI
endchoice
config VBOOT
select VBOOT_LID_SWITCH
select VBOOT_MOCK_SECDATA if BOARD_INTEL_ADLRVP_P_EXT_EC
select EC_GOOGLE_CHROMEEC_SWITCHES if ADL_CHROME_EC
select VBOOT_EARLY_EC_SYNC if BOARD_INTEL_ADLRVP_M_EXT_EC
config UART_FOR_CONSOLE
int
default 0
config DRIVER_TPM_SPI_BUS
default 0x2 if BOARD_INTEL_ADLRVP_M_EXT_EC
config TPM_TIS_ACPI_INTERRUPT
int
default 67 if BOARD_INTEL_ADLRVP_M_EXT_EC # GPE0_DW2_3 (GPP_E3)
endif