c6b041a12e
Break TPM related Kconfig into the following dimensions: TPM transport support: config CRB_TPM config I2C_TPM config SPI_TPM config MEMORY_MAPPED_TPM (new) TPM brand, not defining any of these is valid, and result in "generic" support: config TPM_ATMEL (new) config TPM_GOOGLE (new) config TPM_GOOGLE_CR50 (new, implies TPM_GOOGLE) config TPM_GOOGLE_TI50 (new to be used later, implies TPM_GOOGLE) What protocol the TPM chip supports: config MAINBOARD_HAS_TPM1 config MAINBOARD_HAS_TPM2 What the user chooses to compile (restricted by the above): config NO_TPM config TPM1 config TPM2 The following Kconfigs will be replaced as indicated: config TPM_CR50 -> TPM_GOOGLE config MAINBOARD_HAS_CRB_TPM -> CRB_TPM config MAINBOARD_HAS_I2C_TPM_ATMEL -> I2C_TPM && TPM_ATMEL config MAINBOARD_HAS_I2C_TPM_CR50 -> I2C_TPM && TPM_GOOGLE config MAINBOARD_HAS_I2C_TPM_GENERIC -> I2C_TPM && !TPM_GOOGLE && !TPM_ATMEL config MAINBOARD_HAS_LPC_TPM -> MEMORY_MAPPED_TPM config MAINBOARD_HAS_SPI_TPM -> SPI_TPM && !TPM_GOOGLE && !TPM_ATMEL config MAINBOARD_HAS_SPI_TPM_CR50 -> SPI_TPM && TPM_GOOGLE Signed-off-by: Jes B. Klinke <jbk@chromium.org> Change-Id: I4656b2b90363b8dfd008dc281ad591862fe2cc9e Reviewed-on: https://review.coreboot.org/c/coreboot/+/63424 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
115 lines
3.0 KiB
Plaintext
115 lines
3.0 KiB
Plaintext
config BOARD_INTEL_COFFEELAKE_RVP_COMMON
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def_bool n
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select DRIVERS_GENERIC_MAX98357A
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select DRIVERS_I2C_DA7219
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select DRIVERS_I2C_GENERIC
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select DRIVERS_I2C_HID
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select DRIVERS_I2C_MAX98373
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_TABLES
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select INTEL_LPSS_UART_FOR_CONSOLE
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select MAINBOARD_HAS_CHROMEOS
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select MEMORY_MAPPED_TPM
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select MAINBOARD_USES_IFD_EC_REGION
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config BOARD_INTEL_COFFEELAKE_RVP8
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select BOARD_INTEL_COFFEELAKE_RVP_COMMON
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select BOARD_ROMSIZE_KB_16384
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select MAINBOARD_USES_IFD_GBE_REGION
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select SOC_INTEL_CANNONLAKE_PCH_H
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select SOC_INTEL_COFFEELAKE
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select SOC_INTEL_COMMON_BLOCK_HDA_VERB
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config BOARD_INTEL_COFFEELAKE_RVP11
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select BOARD_INTEL_COFFEELAKE_RVP_COMMON
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select BOARD_ROMSIZE_KB_16384
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select MAINBOARD_USES_IFD_GBE_REGION
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select SOC_INTEL_CANNONLAKE_PCH_H
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select SOC_INTEL_COFFEELAKE
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select SOC_INTEL_COMMON_BLOCK_HDA_VERB
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config BOARD_INTEL_COFFEELAKE_RVPU
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select BOARD_INTEL_COFFEELAKE_RVP_COMMON
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select BOARD_ROMSIZE_KB_32768
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select SOC_INTEL_COFFEELAKE
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config BOARD_INTEL_WHISKEYLAKE_RVP
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select BOARD_INTEL_COFFEELAKE_RVP_COMMON
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select BOARD_ROMSIZE_KB_16384
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select SOC_INTEL_COMMON_BLOCK_HDA_VERB
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select SOC_INTEL_WHISKEYLAKE
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config BOARD_INTEL_COMETLAKE_RVPU
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select BOARD_INTEL_COFFEELAKE_RVP_COMMON
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select BOARD_ROMSIZE_KB_16384
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select SOC_INTEL_COMETLAKE_1
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select SOC_INTEL_COMMON_BLOCK_HDA_VERB
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if BOARD_INTEL_COFFEELAKE_RVP_COMMON
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config MAINBOARD_DIR
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default "intel/coffeelake_rvp"
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config VARIANT_DIR
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default "cfl_u" if BOARD_INTEL_COFFEELAKE_RVPU
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default "cfl_h" if BOARD_INTEL_COFFEELAKE_RVP11
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default "whl_u" if BOARD_INTEL_WHISKEYLAKE_RVP
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default "cfl_s" if BOARD_INTEL_COFFEELAKE_RVP8
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default "cml_u" if BOARD_INTEL_COMETLAKE_RVPU
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config MAINBOARD_PART_NUMBER
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default "whlrvp" if BOARD_INTEL_WHISKEYLAKE_RVP
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default "cmlrvp" if BOARD_INTEL_COMETLAKE_RVPU
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default "cflrvp"
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config MAINBOARD_FAMILY
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string
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default "Intel_whlrvp" if BOARD_INTEL_WHISKEYLAKE_RVP
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default "Intel_cmlrvp" if BOARD_INTEL_COMETLAKE_RVPU
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default "Intel_cflrvp"
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config CHROMEOS
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select GBB_FLAG_FORCE_MANUAL_RECOVERY
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config MAX_CPUS
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int
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default 12 if BOARD_INTEL_COFFEELAKE_RVP11
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default 16 if BOARD_INTEL_COFFEELAKE_RVP8
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default 8
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config UART_FOR_CONSOLE
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int
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default 2
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config DEVICETREE
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default "variants/baseboard/devicetree.cb"
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config OVERRIDE_DEVICETREE
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default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
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config FMDFILE
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depends on VBOOT
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default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" if BOARD_ROMSIZE_KB_16384
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default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/chromeos_32MB.fmd" if BOARD_ROMSIZE_KB_32768
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config INCLUDE_SND_MAX98357_DA7219_NHLT
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bool "Include blobs for audio with MAX98357_DA7219"
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select NHLT_DMIC_4CH_16B
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select NHLT_DMIC_2CH_16B
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select NHLT_DA7219
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select NHLT_MAX98357
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config INCLUDE_SND_MAX98373_NHLT
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bool "Include blobs for audio with MAX98373"
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select NHLT_DMIC_4CH_16B
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select NHLT_DMIC_2CH_16B
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select NHLT_MAX98373
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config DIMM_SPD_SIZE
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default 512
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config VBOOT
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select VBOOT_LID_SWITCH
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select VBOOT_MOCK_SECDATA
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endif
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