f79f775eda
Change-Id: Ib1be1db6f475ad0e1f34703bfe1257d02b86742c Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60067 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
271 lines
6.0 KiB
ArmAsm
271 lines
6.0 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <cpu/x86/cpu_info.S.inc>
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#include <cpu/x86/post_code.h>
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#include <arch/ram_segs.h>
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/* Place the stack in the bss section. It's not necessary to define it in
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* the linker script. */
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.section .bss, "aw", @nobits
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.global _stack
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.global _estack
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.global _stack_size
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/* Stack alignment is not enforced with rmodule loader, reserve one
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* extra CPU such that alignment can be enforced on entry. */
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.align CONFIG_STACK_SIZE
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_stack:
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.space (CONFIG_MAX_CPUS+1)*CONFIG_STACK_SIZE
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_estack:
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.set _stack_size, _estack - _stack
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.section ".text._start", "ax", @progbits
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#if ENV_X86_64
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.code64
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#else
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.code32
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#endif
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.globl _start
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_start:
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cli
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#if ENV_X86_64
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movabs $gdtaddr, %rax
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lgdt (%rax)
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#else
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lgdt %cs:gdtaddr
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ljmp $RAM_CODE_SEG, $1f
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#endif
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1: movl $RAM_DATA_SEG, %eax
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movl %eax, %ds
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movl %eax, %es
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movl %eax, %ss
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xor %eax, %eax /* zero out the gs and fs segment index */
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movl %eax, %fs
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movl %eax, %gs /* Will be used for cpu_info */
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#if ENV_X86_64
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mov $RAM_CODE_SEG64, %ecx
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call SetCodeSelector
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#endif
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post_code(POST_ENTRY_C_START) /* post 13 */
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cld
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#if ENV_X86_64
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mov %rdi, %rax
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movabs %rax, _cbmem_top_ptr
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movabs $_stack, %rdi
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#else
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/* The return argument is at 0(%esp), the calling argument at 4(%esp) */
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movl 4(%esp), %eax
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movl %eax, _cbmem_top_ptr
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leal _stack, %edi
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#endif
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/** poison the stack. Code should not count on the
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* stack being full of zeros. This stack poisoning
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* recently uncovered a bug in the broadcast SIPI
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* code.
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*/
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movl $_estack, %ecx
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subl %edi, %ecx
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shrl $2, %ecx /* it is 32 bit aligned, right? */
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movl $0xDEADBEEF, %eax
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rep
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stosl
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/* Set new stack with enforced alignment. */
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movl $_estack, %esp
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andl $(~(CONFIG_STACK_SIZE-1)), %esp
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push_cpu_info
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#if CONFIG(CPU_INFO_V2)
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/* Allocate the per_cpu_segment_data on the stack */
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push_per_cpu_segment_data
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/*
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* Update the BSP's per_cpu_segment_descriptor to point to the
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* per_cpu_segment_data that was allocated on the stack.
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*/
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set_segment_descriptor_base $per_cpu_segment_descriptors, %esp
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mov $per_cpu_segment_selector, %eax
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movl (%eax), %eax
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mov %eax, %gs
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#endif
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/*
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* Now we are finished. Memory is up, data is copied and
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* bss is cleared. Now we call the main routine and
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* let it do the rest.
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*/
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post_code(POST_PRE_HARDWAREMAIN) /* post 6e */
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andl $0xFFFFFFF0, %esp
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#if CONFIG(ASAN_IN_RAMSTAGE)
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call asan_init
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#endif
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#if CONFIG(GDB_WAIT)
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call gdb_hw_init
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call gdb_stub_breakpoint
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#endif
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call main
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/* NOTREACHED */
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.Lhlt:
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post_code(POST_DEAD_CODE) /* post ee */
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hlt
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jmp .Lhlt
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#if CONFIG(GDB_WAIT)
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.globl gdb_stub_breakpoint
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gdb_stub_breakpoint:
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#if ENV_X86_64
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pop %rax /* Return address */
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pushfl
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push %cs
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push %rax /* Return address */
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push $0 /* No error code */
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push $32 /* vector 32 is user defined */
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#else
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popl %eax /* Return address */
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pushfl
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pushl %cs
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pushl %eax /* Return address */
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pushl $0 /* No error code */
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pushl $32 /* vector 32 is user defined */
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#endif
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jmp int_hand
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#endif
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.globl gdt, gdt_end
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.global per_cpu_segment_descriptors, per_cpu_segment_selector
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gdtaddr:
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.word gdt_end - gdt - 1
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#if ENV_X86_64
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.quad gdt
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#else
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.long gdt /* we know the offset */
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#endif
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.data
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/* This is the gdt for GCC part of coreboot.
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* It is different from the gdt in ASM part of coreboot
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* which is defined in gdt_init.S
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*
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* When the machine is initially started, we use a very simple
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* gdt from ROM (that in gdt_init.S) which only contains those
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* entries we need for protected mode.
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*
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* When we're executing code from RAM, we want to do more complex
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* stuff, like initializing PCI option ROMs in real mode, or doing
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* a resume from a suspend to RAM.
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*/
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gdt:
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/* selgdt 0, unused */
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.word 0x0000, 0x0000 /* dummy */
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.byte 0x00, 0x00, 0x00, 0x00
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/* selgdt 8, unused */
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.word 0x0000, 0x0000 /* dummy */
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.byte 0x00, 0x00, 0x00, 0x00
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/* selgdt 0x10, flat code segment */
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.word 0xffff, 0x0000
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.byte 0x00, 0x9b, 0xcf, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for
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* limit
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*/
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/* selgdt 0x18, flat data segment */
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.word 0xffff, 0x0000
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#if ENV_X86_64
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.byte 0x00, 0x92, 0xcf, 0x00
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#else
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.byte 0x00, 0x93, 0xcf, 0x00
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#endif
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/* selgdt 0x20, unused */
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.word 0x0000, 0x0000 /* dummy */
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.byte 0x00, 0x00, 0x00, 0x00
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/* The next two entries are used for executing VGA option ROMs */
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/* selgdt 0x28 16 bit 64k code at 0x00000000 */
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.word 0xffff, 0x0000
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.byte 0, 0x9a, 0, 0
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/* selgdt 0x30 16 bit 64k data at 0x00000000 */
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.word 0xffff, 0x0000
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.byte 0, 0x92, 0, 0
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/* The next two entries are used for ACPI S3 RESUME */
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/* selgdt 0x38, flat data segment 16 bit */
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.word 0x0000, 0x0000 /* dummy */
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.byte 0x00, 0x93, 0x8f, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for
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* limit
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*/
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/* selgdt 0x40, flat code segment 16 bit */
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.word 0xffff, 0x0000
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.byte 0x00, 0x9b, 0x8f, 0x00 /* G=1 and 0x0f, So we get 4Gbytes for
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* limit
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*/
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#if ENV_X86_64
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/* selgdt 0x48, flat x64 code segment */
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.word 0xffff, 0x0000
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.byte 0x00, 0x9b, 0xaf, 0x00
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#endif
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#if CONFIG(CPU_INFO_V2)
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per_cpu_segment_descriptors:
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.rept CONFIG_MAX_CPUS
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/* flat data segment */
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.word 0xffff, 0x0000
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#if ENV_X86_64
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.byte 0x00, 0x92, 0xcf, 0x00
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#else
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.byte 0x00, 0x93, 0xcf, 0x00
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#endif
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.endr
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#endif /* CPU_INFO_V2 */
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gdt_end:
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#if CONFIG(CPU_INFO_V2)
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/* Segment selector pointing to the first per_cpu_segment_descriptor. */
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per_cpu_segment_selector:
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.long per_cpu_segment_descriptors - gdt
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#endif /* CPU_INFO_V2 */
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.section ".text._start", "ax", @progbits
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#if ENV_X86_64
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SetCodeSelector:
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# save rsp because iret will align it to a 16 byte boundary
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mov %rsp, %rdx
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# use iret to jump to a 64-bit offset in a new code segment
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# iret will pop cs:rip, flags, then ss:rsp
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mov %ss, %ax # need to push ss..
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push %rax # push ss instruction not valid in x64 mode,
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# so use ax
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push %rsp
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pushfq
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push %rcx # cx is code segment selector from caller
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movabs $setCodeSelectorLongJump, %rax
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push %rax
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# the iret will continue at next instruction, with the new cs value
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# loaded
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iretq
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setCodeSelectorLongJump:
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# restore rsp, it might not have been 16-byte aligned on entry
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mov %rdx, %rsp
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ret
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#endif
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