c75c79bd02
As stated in some code files, fixup_virtual_wire was established
to avoid touching 200 invocations of the mptable code.
Let Coccinelle do it:
@@
type T;
identifier v;
@@
-void fixup_virtual_wire(T v)
-{ ... }
@@
expression A;
identifier v;
@@
-v = smp_write_floating_table(A);
+v = smp_write_floating_table(A, 0);
@@
expression A;
identifier v;
@@
-v = smp_write_floating_table(A, 0);
-fixup_virtual_wire(v);
+v = smp_write_floating_table(A, 1);
Change-Id: Icad8a063380bf4726be7cebb414d13b574112b14
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/245
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
111 lines
3.3 KiB
C
111 lines
3.3 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2010 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <console/console.h>
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#include <arch/smp/mpspec.h>
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#include <device/pci.h>
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#include <string.h>
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#include <stdint.h>
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#include <cpu/amd/amdk8_sysconf.h>
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#define PCI_INT(bus, dev, fn, pin) \
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smp_write_intsrc(mc, mp_INT, \
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MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW, \
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bus_mcp55[bus], (((dev) << 2) | (fn)), apicid_mcp55, (pin))
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extern unsigned char bus_mcp55[8];
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extern unsigned apicid_mcp55;
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static void *smp_write_config_table(void *v)
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{
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struct mp_config_table *mc;
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unsigned int sbdn;
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int i, j, bus_isa;
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device_t dev;
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struct resource *res;
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mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
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mptable_init(mc, LAPIC_ADDR);
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smp_write_processors(mc);
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get_bus_conf();
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sbdn = sysconf.sbdn;
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mptable_write_buses(mc, NULL, &bus_isa);
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dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn + 0x1, 0));
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if (dev) {
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res = find_resource(dev, PCI_BASE_ADDRESS_1);
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if (res)
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smp_write_ioapic(mc, apicid_mcp55, 0x11, res->base);
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pci_write_config32(dev, 0x7c, 0x00000000);
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pci_write_config32(dev, 0x80, 0x11002009);
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pci_write_config32(dev, 0x84, 0x2000dd08);
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}
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mptable_add_isa_interrupts(mc, bus_isa, apicid_mcp55, 0);
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/* I/O Ints */
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PCI_INT(0, sbdn + 1, 1, 10); /* SMBus */
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PCI_INT(0, sbdn + 2, 0, 20); /* USB 1.1 */
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PCI_INT(0, sbdn + 2, 1, 22); /* USB 2.0 */
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PCI_INT(0, sbdn + 4, 0, 14); /* IDE */
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PCI_INT(0, sbdn + 5, 0, 23); /* SATA 0 */
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PCI_INT(0, sbdn + 5, 1, 23); /* SATA 1 */
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PCI_INT(0, sbdn + 5, 2, 22); /* SATA 2 */
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PCI_INT(0, sbdn + 6, 1, 21); /* HD audio */
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PCI_INT(0, sbdn + 8, 0, 24); /* NIC */
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/* PCI-E slots (two x1, one x4, one x16) */
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for (j = 7; j >= 2; j--) {
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if (!bus_mcp55[j])
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continue;
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for (i = 0; i < 4; i++)
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PCI_INT(j, 0, i, 0x10 + (2 + j + i + 4 - sbdn % 4) % 4);
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}
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/* PCI slots (three on this board) */
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for (j = 0; j < 3; j++) {
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for (i = 0; i < 4; i++)
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PCI_INT(1, 0x06 + j, i, 0x10 + (2 + i + j) % 4);
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}
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/* Local Ints: Type Trigger Polarity Bus ID IRQ APIC ID PIN# */
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mptable_lintsrc(mc, bus_isa);
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/* Compute the checksums. */
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mc->mpe_checksum =
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smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
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mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
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printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
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mc, smp_next_mpe_entry(mc));
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return smp_next_mpe_entry(mc);
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}
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unsigned long write_smp_table(unsigned long addr)
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{
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void *v;
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v = smp_write_floating_table(addr, 0);
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return (unsigned long)smp_write_config_table(v);
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}
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