aa33609d28
dwc2 host core do not have a periodic schedule list, so try to send an interrupt packet in poll_intr_queue() function and use frame number read from usb core register to calculate time and schedule transfers. BUG=None TEST=Tested on RK3288 with two USB keyboards(connect to SoC without USB hub), both work correctly. BRANCH=None Change-Id: I16f7977c45a84b37c32b7c495ca78ad76be9f0ce Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 3d0206b86634bcfdbe03da3e2c8adf186470e157 Original-Change-Id: Ie54699162ef799f4d3d2a0abf850dbeb62417777 Original-Signed-off-by: Yunzhi Li <lyz@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/280750 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Commit-Queue: Lin Huang <hl@rock-chips.com> Original-Tested-by: Lin Huang <hl@rock-chips.com> Reviewed-on: http://review.coreboot.org/10774 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
51 lines
1.3 KiB
C
51 lines
1.3 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2014 Rockchip Electronics
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.
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*/
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#ifndef __DWC2_REGS_H__
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#define __DWC2_REGS_H__
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#include <usb/dwc2_registers.h>
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typedef struct dwc_ctrl {
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#define DMA_SIZE (64 * 1024)
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void *dma_buffer;
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u32 *hprt0;
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u32 frame;
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} dwc_ctrl_t;
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typedef struct {
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u8 *data;
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endpoint_t *endp;
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int reqsize;
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u32 reqtiming;
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u32 timestamp;
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} intr_queue_t;
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#define DWC2_INST(controller) ((dwc_ctrl_t *)((controller)->instance))
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#define DWC2_REG(controller) ((dwc2_reg_t *)((controller)->reg_base))
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typedef enum {
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HCSTAT_DONE = 0,
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HCSTAT_XFERERR,
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HCSTAT_BABBLE,
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HCSTAT_STALL,
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HCSTAT_UNKNOW,
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HCSTAT_TIMEOUT,
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} hcstat_t;
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#endif
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