Andre Heider c9aa0c3d07 soc/nvidia/tegra210: define missing UART clocks sources ...

These are required to honor CONFIG_CONSOLE_SERIAL_TEGRA210_UARTx later
on.

Change-Id: I7243812fba6f30f1db4db868b258794e7b248be8
Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-on: https://review.coreboot.org/23794
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Julius Werner <jwerner@chromium.org>

2018-02-20 20:35:15 +00:00

..

amd

soc/amd/stoneyridge: Normalize GPIO init

2018-02-17 00:18:38 +00:00

broadcom

soc: Add Kconfig for each soc vendor

2017-10-23 17:18:32 +00:00

dmp

DMP Vortex86ex board & chip: Remove - using LATE_CBMEM_INIT

2018-01-15 23:23:17 +00:00

imgtec

soc: Add Kconfig for each soc vendor

2017-10-23 17:18:32 +00:00

intel

soc/intel/cannonlake: Update GPIO ASL

2018-02-16 04:35:43 +00:00

lowrisc

RISC-V boards: Stop using the config string

2017-11-07 12:31:00 +00:00

marvell

soc: Add Kconfig for each soc vendor

2017-10-23 17:18:32 +00:00

mediatek

soc/mediatek/mt8173: Remove cast of NULL* to void *

2017-11-03 16:03:30 +00:00

nvidia

soc/nvidia/tegra210: define missing UART clocks sources

2018-02-20 20:35:15 +00:00

qualcomm

soc: Add Kconfig for each soc vendor

2017-10-23 17:18:32 +00:00

rockchip

rockchip/rk3399: Pass coreboot table pointer to ARM TF

2018-02-02 22:19:26 +00:00

samsung

soc: Add Kconfig for each soc vendor

2017-10-23 17:18:32 +00:00

ucb

riscv: Remove config string support

2017-12-02 05:25:00 +00:00