Change-Id: I67fc65c5e01bb134e2e3068dc6da03de1183f785 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60623 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
39 lines
932 B
C
39 lines
932 B
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <baseboard/variants.h>
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#include <console/console.h>
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#include <cpu/x86/smm.h>
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#include <ec/google/chromeec/smm.h>
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#include <gpio.h>
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#include <soc/smi.h>
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#include <variant/ec.h>
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#include <variant/gpio.h>
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void mainboard_smi_gpi(u32 gpi_sts)
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{
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printk(BIOS_WARNING, "No GPIO is set up as PAD_SMI, so %s should never end up being "
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"called. gpi_status is %x.\n", __func__, gpi_sts);
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}
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void mainboard_smi_sleep(u8 slp_typ)
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{
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size_t num_gpios;
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const struct soc_amd_gpio *gpios;
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if (CONFIG(EC_GOOGLE_CHROMEEC))
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chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS,
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MAINBOARD_EC_S5_WAKE_EVENTS);
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gpios = variant_sleep_gpio_table(&num_gpios, slp_typ);
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gpio_configure_pads(gpios, num_gpios);
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}
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int mainboard_smi_apmc(u8 apmc)
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{
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if (CONFIG(EC_GOOGLE_CHROMEEC))
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chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS,
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MAINBOARD_EC_SMI_EVENTS);
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return 0;
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}
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