13f66507af
MMIO operations are arch-agnostic so the include path should not be arch/. Change-Id: I0fd70f5aeca02e98e96b980c3aca0819f5c44b98 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31691 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
67 lines
1.6 KiB
C
67 lines
1.6 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2013 Google, Inc.
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* Copyright 2018-present Facebook, Inc.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <device/mmio.h>
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#include <boot/coreboot_tables.h>
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#include <console/uart.h>
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#include <drivers/uart/pl011.h>
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void uart_init(int idx)
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{
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}
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void uart_tx_byte(int idx, unsigned char data)
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{
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struct pl011_uart *regs = uart_platform_baseptr(idx);
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write8(®s->dr, data);
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uart_tx_flush(idx);
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}
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void uart_tx_flush(int idx)
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{
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struct pl011_uart *regs = uart_platform_baseptr(idx);
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/* FIXME: add a timeout */
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while (!(read32(®s->fr) & PL011_UARTFR_TXFE))
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;
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}
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unsigned char uart_rx_byte(int idx)
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{
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struct pl011_uart *regs = uart_platform_baseptr(idx);
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while (read32(®s->fr) & PL011_UARTFR_RXFE)
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;
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return read8(®s->dr);
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}
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#ifndef __PRE_RAM__
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void uart_fill_lb(void *data)
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{
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struct lb_serial serial;
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serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
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serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
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serial.baud = get_uart_baudrate();
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serial.regwidth = 1;
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serial.input_hertz = uart_platform_refclk();
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serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
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lb_add_serial(&serial, data);
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lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
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}
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#endif
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