Subrata Banik ccd8700cac soc/intel/apollolake: Use common PCR module ...

This patch use common PCR library to perform CRRd and CRWr operation
using Port Ids, define inside soc/pcr_ids.h

Change-Id: Iacbf58dbd55bf3915676d875fcb484362d357a44
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/18673
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

2017-04-10 20:05:35 +02:00

..

acpi

src/acpi: Capitalize ACPI and SATA

2016-07-31 19:25:40 +02:00

arch

arch/x86: remove CAR global migration when postcar stage is used

2017-04-08 23:22:02 +02:00

commonlib

commonlib: Wrap lines at 80 columns

2017-03-13 21:23:21 +01:00

console

console: Enable do_printk_va_list for VBOOT

2016-12-27 18:07:39 +01:00

cpu

arch/x86: remove CAR global migration when postcar stage is used

2017-04-08 23:22:02 +02:00

device

libgfxinit: Select CONFIG_VGA when needed

2017-04-08 13:03:52 +02:00

drivers

drivers/spi: Get rid of spi_get_config

2017-04-09 21:35:53 +02:00

ec

ec/roda/it8518: Do EC write manually with long timeout

2017-04-08 13:17:56 +02:00

include

drivers/spi: Get rid of spi_get_config

2017-04-09 21:35:53 +02:00

lib

src/lib/jpeg: Fix missing closing brace

2017-03-29 13:05:18 +02:00

mainboard

google/eve: Update I2C bus timing

2017-04-10 10:07:33 +02:00

northbridge

AGESA: Add helpers to track heap relocation

2017-04-08 15:19:43 +02:00

soc

soc/intel/apollolake: Use common PCR module

2017-04-10 20:05:35 +02:00

southbridge

northbridge/amd/stoney: Add FT4 package

2017-04-06 22:13:32 +02:00

superio

superio/fintek: Add support for Fintek F71808A

2017-03-27 19:19:56 +02:00

vboot

Remove libverstage as separate library and source file class

2017-03-28 22:18:53 +02:00

vendorcode

AGESA f14: Fix memory clock register decoding

2017-04-08 15:19:09 +02:00

Kconfig

GDB_WAIT: Clarify Kconfig description

2017-03-14 22:20:47 +01:00