ce642f08b9
* Rename it to HAVE_VGA_TEXT_FRAMEBUFFER. * Let drivers select it if they are in charge. * Don't select it on the mainboard level if a driver handles it. Change-Id: I2d9d09be9aa6d019e77460e69a245ad2d8cda4ea Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/19791 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
58 lines
1.2 KiB
Plaintext
58 lines
1.2 KiB
Plaintext
##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2010 Google Inc.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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config NORTHBRIDGE_INTEL_NEHALEM
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bool
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select CPU_INTEL_MODEL_2065X
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select VGA
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select INTEL_EDID
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select TSC_MONOTONIC_TIMER
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select INTEL_GMA_ACPI
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select NORTHBRIDGE_INTEL_COMMON_MRC_CACHE
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select ACPI_HUGE_LOWMEM_BACKUP
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select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
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if NORTHBRIDGE_INTEL_NEHALEM
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config MMCONF_BUS_NUMBER
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int
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default 256
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config CBFS_SIZE
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hex
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default 0x100000
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config VGA_BIOS_ID
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string
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default "8086,0046"
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config DCACHE_RAM_BASE
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hex
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default 0xfefc0000
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config DCACHE_RAM_SIZE
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hex
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default 0x10000
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config BOOTBLOCK_NORTHBRIDGE_INIT
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string
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default "northbridge/intel/nehalem/bootblock.c"
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config MRC_CACHE_SIZE
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hex
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default 0x10000
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endif
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