ceb409a2a6
Add new librem_whl baseboard and Librem Mini variant. Tested with SeaBIOS, Tianocore, and Heads payloads. All functions working normally except SATA, which is limited via a FSP UPD to 3Gbps until the correct HSIO PHY settings can be determined. https://puri.sm/products/librem-mini/ Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> Change-Id: I36af42766f85eb17f86f6ec9b48b87125fb911e6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/40278 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
8 lines
248 B
Makefile
8 lines
248 B
Makefile
## SPDX-License-Identifier: GPL-2.0-only
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ramstage-y += variants/$(VARIANT_DIR)/gpio.c
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ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
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ramstage-y += ramstage.c
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CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include
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