cf246d5166
Objects that are created with acpigen need to be declared with External () for the generation of dsdt.asl to pass iasl without errors. There are some objects that are common to all platforms, and some that should be declared only conditionally. Having a top-level ASL helps to achieve this. Change-Id: Ibaf1ab9941b82f99e5fa857c0c7e4b6192c74330 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49794 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Christian Walter <christian.walter@9elements.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
52 lines
1.1 KiB
Plaintext
52 lines
1.1 KiB
Plaintext
/* SPDX-License-Identifier: GPL-2.0-only */
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/* DefinitionBlock Statement */
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#include <acpi/acpi.h>
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DefinitionBlock (
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"dsdt.aml",
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"DSDT",
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ACPI_DSDT_REV_2,
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OEM_ID,
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ACPI_TABLE_CREATOR,
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0x00010001 /* OEM Revision */
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)
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{ /* Start of ASL file */
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#include <acpi/dsdt_top.asl>
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#include "acpi/mainboard.asl"
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#include <cpu/amd/agesa/family14/acpi/cpu.asl>
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#include "acpi/routing.asl"
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Scope(\_SB) {
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/* global utility methods expected within the \_SB scope */
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#include <arch/x86/acpi/globutil.asl>
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Device(PCI0) {
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/* Describe the AMD Northbridge */
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#include <northbridge/amd/agesa/family14/acpi/northbridge.asl>
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/* Describe the AMD Fusion Controller Hub Southbridge */
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#include <southbridge/amd/cimx/sb800/acpi/fch.asl>
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/* Primary (and only) IDE channel */
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Device(IDEC) {
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Name(_ADR, 0x00140001)
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#include "acpi/ide.asl"
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} /* end IDEC */
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}
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} /* End Scope(_SB) */
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/* Contains the supported sleep states for this chipset */
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#include <southbridge/amd/common/acpi/sleepstates.asl>
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/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
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#include "acpi/sleep.asl"
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#include "acpi/gpe.asl"
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}
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/* End of ASL file */
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