cff479e930
This change adds a driver pcie_gpp.c which provides device_operations for external and internal PCIe GPP bridges. These device operations include standard PCI bridge operations as well as operations for generating ACPI node for the device and returning appropriate ACPI name for it. Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: I9f8809c2735bdc09435deda91a570c89e71e8062 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43312 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
61 lines
1.4 KiB
C
61 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <acpi/acpigen.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <soc/pci_devs.h>
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#include <stdio.h>
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static const char *pcie_gpp_acpi_name(const struct device *dev)
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{
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if (dev->path.type != DEVICE_PATH_PCI)
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return NULL;
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switch (dev->path.pci.devfn) {
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case PCIE_GPP_0_DEVFN:
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return "PBR0";
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case PCIE_GPP_1_DEVFN:
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return "PBR1";
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case PCIE_GPP_2_DEVFN:
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return "PBR2";
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case PCIE_GPP_3_DEVFN:
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return "PBR3";
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case PCIE_GPP_4_DEVFN:
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return "PBR4";
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case PCIE_GPP_5_DEVFN:
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return "PBR5";
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case PCIE_GPP_6_DEVFN:
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return "PBR6";
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case PCIE_GPP_A_DEVFN:
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return "PBRA";
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case PCIE_GPP_B_DEVFN:
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return "PBRB";
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}
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return NULL;
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}
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static struct device_operations pcie_gpp_ops = {
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.read_resources = pci_bus_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_bus_enable_resources,
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.scan_bus = pci_scan_bridge,
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.reset_bus = pci_bus_reset,
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.acpi_name = pcie_gpp_acpi_name,
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.acpi_fill_ssdt = acpi_device_write_pci_dev,
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};
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static const unsigned short pci_device_ids[] = {
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PCI_DEVICE_ID_AMD_FAM17H_PCIE_GPP,
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PCI_DEVICE_ID_AMD_FAM17H_PCIE_GPP_BUSA,
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PCI_DEVICE_ID_AMD_FAM17H_PCIE_GPP_BUSB,
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0
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};
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static const struct pci_driver pcie_gpp_driver __pci_driver = {
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.ops = &pcie_gpp_ops,
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.vendor = PCI_VENDOR_ID_AMD,
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.devices = pci_device_ids,
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};
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