d0e212cdce
Use of scan_static_bus() and tree traversals is somewhat convoluted. Start cleaning this up by assigning each path type with separate static scan_bus() function. For ME, SMBus and LPC paths a bus cannot expose bridges, as those would add to the number of encountered PCI buses. Change-Id: I8bb11450516faad4fa33b8f69bce5b9978ec75e5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8534 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
117 lines
3.1 KiB
C
117 lines
3.1 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008-2009 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.
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*/
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#include <console/console.h>
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#include <device/device.h>
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#include <device/path.h>
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#include <device/smbus.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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#include <arch/io.h>
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#include "smbus.h"
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static void pch_smbus_init(device_t dev)
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{
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u16 reg16;
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/* Enable clock gating */
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reg16 = pci_read_config16(dev, 0x80);
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reg16 &= ~((1 << 8)|(1 << 10)|(1 << 12)|(1 << 14));
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pci_write_config16(dev, 0x80, reg16);
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}
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static int lsmbus_read_byte(device_t dev, u8 address)
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{
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u16 device;
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struct resource *res;
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struct bus *pbus;
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device = dev->path.i2c.device;
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pbus = get_pbus_smbus(dev);
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res = find_resource(pbus->dev, 0x20);
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return do_smbus_read_byte(res->base, device, address);
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}
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static int lsmbus_write_byte(device_t dev, u8 address, u8 val)
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{
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u16 device;
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struct resource *res;
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struct bus *pbus;
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device = dev->path.i2c.device;
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pbus = get_pbus_smbus(dev);
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res = find_resource(pbus->dev, 0x20);
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return do_smbus_write_byte(res->base, device, address, val);
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}
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static struct smbus_bus_operations lops_smbus_bus = {
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.read_byte = lsmbus_read_byte,
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.write_byte = lsmbus_write_byte,
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};
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static void smbus_set_subsystem(device_t dev, unsigned vendor, unsigned device)
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{
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if (!vendor || !device) {
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pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
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pci_read_config32(dev, PCI_VENDOR_ID));
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} else {
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pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
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((device & 0xffff) << 16) | (vendor & 0xffff));
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}
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}
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static struct pci_operations smbus_pci_ops = {
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.set_subsystem = smbus_set_subsystem,
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};
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static void smbus_read_resources(device_t dev)
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{
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struct resource *res = new_resource(dev, PCI_BASE_ADDRESS_4);
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res->base = SMBUS_IO_BASE;
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res->size = 32;
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res->limit = res->base + res->size - 1;
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res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_RESERVE |
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IORESOURCE_STORED | IORESOURCE_ASSIGNED;
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/* Also add MMIO resource */
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res = pci_get_resource(dev, PCI_BASE_ADDRESS_0);
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}
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static struct device_operations smbus_ops = {
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.read_resources = smbus_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.scan_bus = scan_smbus,
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.init = pch_smbus_init,
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.ops_smbus_bus = &lops_smbus_bus,
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.ops_pci = &smbus_pci_ops,
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};
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static const unsigned short pci_device_ids[] = { 0x2930, 0 };
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static const struct pci_driver pch_smbus __pci_driver = {
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.ops = &smbus_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.devices = pci_device_ids,
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};
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