system76-coreboot

Files

Stefan Reinauer d1cb0eecd1 sb800: move spi prefetch and fast read mode to sb bootblock.

So we don't waste time on the first cbfs scan.

Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
[adapt persimmon with the same change, and work around romcc bug
 in bootblock code: it doesn't like MEMACCESS[idx] |= value;]

Change-Id: Ic4d0e53d3102be0de0bd18b1b8b29c500bd6d997
Reviewed-on: http://review.coreboot.org/9
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Marc Jones <marcj303@gmail.com>

2011-06-20 19:08:05 +02:00

arch/x86

We don't have pausing versions of single-IO instructions.

2011-05-23 22:48:13 +00:00

boot

more ifdef -> if fixes.

2011-04-21 21:26:58 +00:00

console

Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an

2011-04-26 23:47:04 +00:00

cpu

SMM: flush caches after disabling caching