b8b3e8bff3
After removing power and the CMOS Battery, putting it back
and booting coreboot we have:
# ./nvramtool -a
boot_option = Fallback
last_boot = Fallback
ECC_memory = Enable
baud_rate = 115200
hw_scrubber = Enable
interleave_chip_selects = Enable
max_mem_clock = 400Mhz
multi_core = Enable
power_on_after_fail = Disable
debug_level = Spew
boot_first = HDD
boot_second = Fallback_Floppy
boot_third = Fallback_Network
boot_index = 0xf
boot_countdown = 0xc
slow_cpu = off
nmi = Enable
iommu = Enable
nvramtool: Can not read coreboot parameter user_data because layout info specifies CMOS area that is too wide.
nvramtool: Warning: Coreboot CMOS checksum is bad.
Change-Id: Ifa09c7a468e3e0713b426763266ae633e67d8397
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Reviewed-on: http://review.coreboot.org/3224
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
19 lines
351 B
Plaintext
19 lines
351 B
Plaintext
boot_option=Fallback
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last_boot=Fallback
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ECC_memory=Enable
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baud_rate=115200
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hw_scrubber=Enable
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interleave_chip_selects=Enable
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max_mem_clock=400Mhz
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multi_core=Enable
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power_on_after_fail=Disable
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debug_level=Spew
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boot_first=HDD
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boot_second=Fallback_Floppy
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boot_third=Fallback_Network
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boot_index=0xf
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boot_countdown=0xc
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slow_cpu=off
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nmi=Enable
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iommu=Enable
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