d2ebe16cb4
The SoC's uart_info structs all use the same anonymous uart_info struct definition, so create a named struct for this in the common AMD SoC UART header and use it in the SoC code. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Id183a3c838c6ad26e264c2a29f3c20b00f10d9be Reviewed-on: https://review.coreboot.org/c/coreboot/+/68530 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
122 lines
2.9 KiB
C
122 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <amdblocks/aoac.h>
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#include <amdblocks/gpio.h>
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#include <amdblocks/uart.h>
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#include <commonlib/helpers.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <device/mmio.h>
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#include <soc/aoac_defs.h>
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#include <soc/gpio.h>
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#include <soc/southbridge.h>
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#include <soc/uart.h>
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#include <types.h>
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static const struct soc_uart_ctrlr_info uart_info[] = {
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[0] = { APU_UART0_BASE, FCH_AOAC_DEV_UART0, "FUR0", {
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PAD_NF(GPIO_143, UART0_TXD, PULL_NONE),
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PAD_NF(GPIO_141, UART0_RXD, PULL_NONE),
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} },
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[1] = { APU_UART1_BASE, FCH_AOAC_DEV_UART1, "FUR1", {
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PAD_NF(GPIO_140, UART1_TXD, PULL_NONE),
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PAD_NF(GPIO_142, UART1_RXD, PULL_NONE),
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} },
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[2] = { APU_UART2_BASE, FCH_AOAC_DEV_UART2, "FUR2", {
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PAD_NF(GPIO_138, UART2_TXD, PULL_NONE),
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PAD_NF(GPIO_136, UART2_RXD, PULL_NONE),
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} },
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[3] = { APU_UART3_BASE, FCH_AOAC_DEV_UART3, "FUR3", {
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PAD_NF(GPIO_135, UART3_TXD, PULL_NONE),
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PAD_NF(GPIO_137, UART3_RXD, PULL_NONE),
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} },
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[4] = { APU_UART4_BASE, FCH_AOAC_DEV_UART4, "FUR4", {
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PAD_NF(GPIO_156, UART4_TXD, PULL_NONE),
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PAD_NF(GPIO_155, UART4_RXD, PULL_NONE),
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} },
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};
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uintptr_t get_uart_base(unsigned int idx)
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{
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if (idx >= ARRAY_SIZE(uart_info))
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return 0;
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return uart_info[idx].base;
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}
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static enum cb_err get_uart_idx(uintptr_t base, unsigned int *idx)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(uart_info); i++) {
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if (base == uart_info[i].base) {
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*idx = i;
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return CB_SUCCESS;
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}
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}
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return CB_ERR;
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}
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static enum cb_err get_uart_aoac_device(uintptr_t base, unsigned int *aoac_dev)
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{
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unsigned int idx;
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if (get_uart_idx(base, &idx) == CB_ERR)
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return CB_ERR;
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*aoac_dev = uart_info[idx].aoac_device;
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return CB_SUCCESS;
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}
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void clear_uart_legacy_config(void)
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{
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write16p(FCH_LEGACY_UART_DECODE, 0);
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}
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void set_uart_config(unsigned int idx)
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{
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if (idx >= ARRAY_SIZE(uart_info))
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return;
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gpio_configure_pads(uart_info[idx].mux, 2);
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}
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static const char *uart_acpi_name(const struct device *dev)
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{
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unsigned int idx;
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if (get_uart_idx(dev->path.mmio.addr, &idx) == CB_SUCCESS)
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return uart_info[idx].acpi_name;
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else
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return NULL;
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}
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/* Even though this is called enable, it gets called for both enabled and disabled devices. */
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static void uart_enable(struct device *dev)
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{
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unsigned int dev_id;
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if (get_uart_aoac_device(dev->path.mmio.addr, &dev_id) == CB_ERR) {
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printk(BIOS_ERR, "%s: Unknown device: %s\n", __func__, dev_path(dev));
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return;
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}
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if (dev->enabled) {
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power_on_aoac_device(dev_id);
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wait_for_aoac_enabled(dev_id);
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} else {
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power_off_aoac_device(dev_id);
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}
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}
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static void uart_read_resources(struct device *dev)
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{
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mmio_resource_kb(dev, 0, dev->path.mmio.addr / KiB, 4);
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}
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struct device_operations mendocino_uart_mmio_ops = {
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.read_resources = uart_read_resources,
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.set_resources = noop_set_resources,
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.scan_bus = scan_static_bus,
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.enable = uart_enable,
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.acpi_name = uart_acpi_name,
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.acpi_fill_ssdt = uart_inject_ssdt,
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};
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