The current MRC binaries for Bay Trail are always ELF files. Always adjust the position in CBFS using the ELF header regardless of file names. Without adjusting the position, the system hangs right after calling into MRC. TEST: MRC position in CBFS does not change for bostentech/gbyt4. Change-Id: I74e1246a5fac3f3649be9842ff13c2fc70f72a20 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57989 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
89 lines
2.3 KiB
Makefile
89 lines
2.3 KiB
Makefile
ifeq ($(CONFIG_SOC_INTEL_BAYTRAIL),y)
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subdirs-y += romstage
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subdirs-y += ../../../cpu/x86/lapic
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subdirs-y += ../../../cpu/x86/mtrr
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subdirs-y += ../../../cpu/intel/microcode
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subdirs-y += ../../../cpu/intel/turbo
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subdirs-y += ../../../cpu/intel/common
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all-y += tsc_freq.c
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bootblock-y += ../../../cpu/intel/car/non-evict/cache_as_ram.S
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bootblock-y += ../../../cpu/intel/car/bootblock.c
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bootblock-y += ../../../cpu/x86/early_reset.S
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bootblock-y += bootblock/bootblock.c
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romstage-y += iosf.c
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romstage-y += memmap.c
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romstage-y += pmutil.c
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postcar-y += iosf.c
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postcar-y += memmap.c
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ramstage-y += acpi.c
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ramstage-y += chip.c
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ramstage-y += cpu.c
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ramstage-y += dptf.c
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ramstage-y += ehci.c
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ramstage-y += emmc.c
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ramstage-y += fadt.c
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ramstage-y += gfx.c
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ramstage-y += gpio.c
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ramstage-y += hda.c
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ramstage-y += iosf.c
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ramstage-y += lpe.c
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ramstage-y += lpss.c
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ramstage-y += memmap.c
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ramstage-y += northcluster.c
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ramstage-y += pcie.c
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ramstage-y += perf_power.c
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ramstage-y += pmutil.c
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ramstage-y += ramstage.c
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ramstage-y += sata.c
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ramstage-y += scc.c
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ramstage-y += sd.c
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ramstage-y += smm.c
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ramstage-y += southcluster.c
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ramstage-y += xhci.c
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ramstage-$(CONFIG_ELOG) += elog.c
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ramstage-$(CONFIG_VGA_ROM_RUN) += int15.c
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ifeq ($(CONFIG_HAVE_REFCODE_BLOB),y)
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ramstage-y += refcode.c
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else
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ramstage-y += modphy_table.c refcode_native.c
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endif
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smm-y += iosf.c
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smm-y += pmutil.c
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smm-y += smihandler.c
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smm-y += tsc_freq.c
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# Remove as ramstage gets fleshed out
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ramstage-y += placeholders.c
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postcar-y += ../../../cpu/intel/car/non-evict/exit_car.S
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cpu_microcode_bins += 3rdparty/blobs/soc/intel/baytrail/microcode.bin \
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3rdparty/intel-microcode/intel-ucode/06-37-09
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CPPFLAGS_common += -Isrc/soc/intel/baytrail/include
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ifeq ($(CONFIG_HAVE_MRC),y)
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# Bay Trail MRC is an ELF file. Determine the entry address and first loadable
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# section offset in the file. Subtract the offset from the entry address to
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# determine the final location.
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mrcelfoffset = $(shell $(READELF_x86_32) -S -W $(CONFIG_MRC_FILE) | sed -e 's/\[ /[0/' | awk '$$3 ~ /PROGBITS/ { print "0x"$$5; exit }' )
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mrcelfentry = $(shell $(READELF_x86_32) -h -W $(CONFIG_MRC_FILE) | grep 'Entry point address' | awk '{print $$NF }')
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# Add memory reference code blob.
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cbfs-files-y += mrc.bin
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mrc.bin-file := $(call strip_quotes,$(CONFIG_MRC_FILE))
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mrc.bin-position := $(shell printf "0x%x" $$(( $(mrcelfentry) - $(mrcelfoffset) )) )
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mrc.bin-type := mrc
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endif
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endif
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