f8c7c2396e
Fix regression after commit: 7dfe32c5408916b6cb23f1ec48e473e1c728d300 Only align 16-bit entry on platforms that really require it, indicated by selecting SIPI_VECTOR_IN_ROM in CPU Kconfig. Disable assertion test of AP_SIPI_VECTOR for platforms not depending on this feature. Build of romstage should be fixed to get the vector address from bootblock build automatically. Change-Id: Ide470833c0254df1a9ff708369ab1c095ccfb98d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/875 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
33 lines
597 B
Plaintext
33 lines
597 B
Plaintext
config CPU_INTEL_SOCKET_MPGA604
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bool
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if CPU_INTEL_SOCKET_MPGA604
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config SOCKET_SPECIFIC_OPTIONS # dummy
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def_bool y
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select CPU_INTEL_MODEL_F2X
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select CPU_INTEL_MODEL_F3X
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select CPU_INTEL_MODEL_F4X
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select MMX
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select SSE
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select UDELAY_TSC
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select SIPI_VECTOR_IN_ROM
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# mPGA604 are usually Intel Netburst CPUs which should have SSE2
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# but the ramtest.c code on the Dell S1850 seems to choke on
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# enabling it, so disable it for now.
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config SSE2
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bool
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default n
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config DCACHE_RAM_BASE
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hex
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default 0x0ffafc000
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config DCACHE_RAM_SIZE
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hex
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default 0x4000
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endif # CPU_INTEL_SOCKET_MPGA604
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