6d81646314
Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6226 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
110 lines
3.7 KiB
C
110 lines
3.7 KiB
C
/*
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* This file is part of the superiotool project.
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*
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* Copyright (C) 2010 Google Inc.
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* Written by David Hendricks <dhendrix@google.com> for Nuvoton Technology Corp.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "superiotool.h"
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#define DEVICE_ID_REG 0x20 /* Super I/O ID (SID) / family */
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#define DEVICE_REV_REG 0x27 /* Super I/O revision ID (SRID) */
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static const struct superio_registers reg_table[] = {
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{0xfc, "WPCE775x / NPCE781x", {
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{NOLDN, NULL,
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{0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
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0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
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{0xFC,0x11,RSVD,RSVD,RSVD,0x00,0x00,MISC,0x00,
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0x04,RSVD,RSVD,RSVD,0x00,RSVD,RSVD,EOT}},
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{0x03, "CIR Port (CIRP)", /* where supported */
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{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
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{0x00,0x03,0xf8,0x04,0x03,0x04,0x04,0x02,EOT}},
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{0x04, "Mobile System Wake-Up Control Config (MSWC)",
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{0x30,0x60,0x61,0x70,0x71,0x74,0x75,EOT},
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{0x00,0x00,0x00,0x00,0x03,0x04,0x04,EOT}},
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{0x05, "Mouse config (KBC)",
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{0x30,0x70,0x71,0x74,0x75,EOT},
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{0x00,0x0c,0x03,0x04,0x04,EOT}},
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{0x06, "Keyboard config (KBC)",
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{0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,EOT},
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{0x00,0x00,0x60,0x00,0x64,0x01,0x03,0x04,0x04,EOT}},
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{0x0f, "Shared memory (SHM)",
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{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,0xf2,
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0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xfa,0xfb,EOT},
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{0x00,0x00,0x00,0x00,0x00,0x04,0x04,MISC,0x07,RSVD,
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RSVD,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
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{0x11, "Power management I/F Channel 1 (PM1)",
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{0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,EOT},
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{0x00,0x00,0x62,0x00,0x66,0x01,0x03,0x04,0x04,EOT}},
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{0x12, "Power management I/F Channel 2 (PM2)",
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{0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,EOT},
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{0x00,0x00,0x68,0x00,0x6c,0x01,0x03,0x04,0x04,EOT}},
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{0x15, "Enhanced Wake On CIR (EWOC)",
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{0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,EOT},
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{0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,EOT}},
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{0x17, "Power Management I/F Channel 3 (PM3)",
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{0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,EOT},
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{0x00,0x00,0x6a,0x00,0x6e,0x01,0x03,0x04,0x04,EOT}},
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{0x1a, "Serial Port with Fast Infrared Port (FIR)",
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{0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
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{0x00,0x02,0xf8,0x03,0x03,0x04,0x04,0x02,EOT}},
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{EOT}}},
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{0x1a, "WPCM450", {
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{EOT}}},
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{EOT}
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};
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void probe_idregs_nuvoton(uint16_t port)
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{
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uint8_t sid, srid;
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uint8_t chip_id = 0, chip_rev = 0;
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probing_for("Nuvoton", "(sid=0xfc) ", port);
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sid = regval(port, DEVICE_ID_REG);
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srid = regval(port, DEVICE_REV_REG);
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if (sid == 0xfc) { /* WPCE775xL family */
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/*
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* bits 7-5: Chip ID
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* bits 4-0: Chip revision
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*/
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chip_id = srid >> 5;
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chip_rev = srid & 0x1f;
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}
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if (superio_unknown(reg_table, sid)) {
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if (verbose)
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printf(NOTFOUND
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"sid=0x%02x, id=0x%02x, rev=0x%02x\n", sid,
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chip_id, chip_rev);
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return;
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}
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printf("Found Nuvoton %s (id=0x%02x, rev=0x%02x) at 0x%x\n",
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get_superio_name(reg_table, sid), chip_id, chip_rev, port);
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chip_found = 1;
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dump_superio("Nuvoton", reg_table, port, sid, LDN_SEL);
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}
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void print_nuvoton_chips(void)
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{
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print_vendor_chips("Nuvoton", reg_table);
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}
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