This should be able to generate bootable ports for sandy/ivy, possible with minor fixes. Howto is in readme.md Change-Id: Ia126cf0939ef2dc2cdbb7ea100d2b63ea6b02f28 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7131 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
		
			
				
	
	
		
			296 lines
		
	
	
		
			5.9 KiB
		
	
	
	
		
			Go
		
	
	
	
	
	
			
		
		
	
	
			296 lines
		
	
	
		
			5.9 KiB
		
	
	
	
		
			Go
		
	
	
	
	
	
| package main
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| 
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| import "fmt"
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| 
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| func LenovoEC(ctx Context) {
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| 	ap := Create(ctx, "acpi/platform.asl")
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| 	defer ap.Close()
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| 
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| 	wakeGPE := 13
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| 
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| 	sbGPE := GuessECGPE(ctx)
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| 	var GPE int
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| 	var GPEUnsure bool
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| 	if sbGPE < 0 {
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| 		sbGPE = SouthBridge.EncodeGPE(1)
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| 		GPE = 1
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| 		GPEUnsure = true
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| 		SouthBridge.NeedRouteGPIOManually()
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| 	} else {
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| 		GPE = SouthBridge.DecodeGPE(sbGPE)
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| 		GPEUnsure = false
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| 	}
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| 
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| 	SouthBridge.EnableGPE(wakeGPE)
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| 	SouthBridge.EnableGPE(GPE)
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| 
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| 	GPEDefine := DSDTDefine{
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| 		Key: "THINKPAD_EC_GPE",
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| 	}
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| 
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| 	GPEDefine.Value = fmt.Sprintf("%d", sbGPE)
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| 	if GPEUnsure {
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| 		GPEDefine.Comment = "FIXME: Check this"
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| 	}
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| 
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| 	DSDTDefines = append(DSDTDefines,
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| 		DSDTDefine{
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| 			Key:   "EC_LENOVO_H8_ME_WORKAROUND",
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| 			Value: "1",
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| 		}, GPEDefine)
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| 
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| 	ap.WriteString(
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| 		`Method(_WAK,1)
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| {
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| 	/* ME may not be up yet.  */
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| 	Store (0, \_TZ.MEB1)
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| 	Store (0, \_TZ.MEB2)
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| 	Return(Package(){0,0})
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| }
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| 
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| Method(_PTS,1)
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| {
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| 	\_SB.PCI0.LPCB.EC.RADI(0)
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| }
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| `)
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| 
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| 	si := Create(ctx, "acpi/superio.asl")
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| 	defer si.Close()
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| 
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| 	si.WriteString("#include <drivers/pc80/ps2_controller.asl>\n")
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| 
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| 	dock := Create(ctx, "dock.c")
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| 	defer dock.Close()
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| 
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| 	AddRAMStageFile("dock.c", "")
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| 
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| 	dock.WriteString(
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| 		`#include <ec/lenovo/h8/h8.h>
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| 
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| void h8_mainboard_init_dock (void)
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| {
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| /* FIXME: fill this if needed.  */
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| }
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| `)
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| 
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| 	/* FIXME:XX Move this to ec/lenovo.  */
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| 	smi := Create(ctx, "smihandler.c")
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| 	defer smi.Close()
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| 
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| 	AddSMMFile("smihandler.c", "")
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| 
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| 	smi.WriteString(
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| 		`/*
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|  * This file is part of the coreboot project.
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|  *
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|  * Copyright (C) 2008-2009 coresystems GmbH
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|  * Copyright (C) 2014 Vladimir Serbinenko
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License as
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|  * published by the Free Software Foundation; version 2 of
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|  * the License.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc.
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|  */
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| 
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| #include <arch/io.h>
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| #include <console/console.h>
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| #include <cpu/x86/smm.h>
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| #include <ec/acpi/ec.h>
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| #include <ec/lenovo/h8/h8.h>
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| #include <delay.h>
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| #include <` + SouthBridge.GetGPIOHeader() + ">\n\n")
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| 
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| 	if GPEUnsure {
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| 		smi.WriteString("/* FIXME: check this */\n")
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| 	}
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| 	fmt.Fprintf(smi, "#define GPE_EC_SCI	%d\n", GPE)
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| 
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| 	smi.WriteString("/* FIXME: check this */\n")
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| 	fmt.Fprintf(smi, "#define GPE_EC_WAKE	%d\n", wakeGPE)
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| 
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| 	smi.WriteString(`
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| static void mainboard_smm_init(void)
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| {
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| 	printk(BIOS_DEBUG, "initializing SMI\n");
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| 	/* Enable 0x1600/0x1600 register pair */
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| 	ec_set_bit(0x00, 0x05);
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| }
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| 
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| int mainboard_io_trap_handler(int smif)
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| {
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| 	static int smm_initialized;
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| 
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| 	if (!smm_initialized) {
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| 		mainboard_smm_init();
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| 		smm_initialized = 1;
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| static void mainboard_smi_handle_ec_sci(void)
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| {
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| 	u8 status = inb(EC_SC);
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| 	u8 event;
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| 
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| 	if (!(status & EC_SCI_EVT))
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| 		return;
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| 
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| 	event = ec_query();
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| 	printk(BIOS_DEBUG, "EC event %02x\n", event);
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| }
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| 
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| void mainboard_smi_gpi(u32 gpi_sts)
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| {
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| 	if (gpi_sts & (1 << GPE_EC_SCI))
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| 		mainboard_smi_handle_ec_sci();
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| }
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| 
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| int mainboard_smi_apmc(u8 data)
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| {
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| 	switch (data) {
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| 	case APM_CNT_ACPI_ENABLE:
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| 		/* use 0x1600/0x1604 to prevent races with userspace */
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| 		ec_set_ports(0x1604, 0x1600);
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| 		/* route EC_SCI to SCI */
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| 		gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SCI);
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| 		/* discard all events, and enable attention */
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| 		ec_write(0x80, 0x01);
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| 		break;
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| 	case APM_CNT_ACPI_DISABLE:
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| 		/* we have to use port 0x62/0x66, as 0x1600/0x1604 doesn't
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| 		   provide a EC query function */
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| 		ec_set_ports(0x66, 0x62);
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| 		/* route EC_SCI to SMI */
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| 		gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SMI);
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| 		/* discard all events, and enable attention */
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| 		ec_write(0x80, 0x01);
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| 		break;
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| 	default:
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| 		break;
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| 	}
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| 	return 0;
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| }
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| 
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| void mainboard_smi_sleep(u8 slp_typ)
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| {
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| 	if (slp_typ == 3) {
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| 		u8 ec_wake = ec_read(0x32);
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| 		/* If EC wake events are enabled, enable wake on EC WAKE GPE.  */
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| 		if (ec_wake & 0x14) {
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| 			/* Redirect EC WAKE GPE to SCI.  */
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| 			gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI);
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| 		}
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| 	}
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| }
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| `)
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| 
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| 	ec := Create(ctx, "acpi/ec.asl")
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| 	defer ec.Close()
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| 
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| 	ec.WriteString("#include <ec/lenovo/h8/acpi/ec.asl>\n")
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| 
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| 	KconfigBool["EC_LENOVO_PMH7"] = true
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| 	KconfigBool["EC_LENOVO_H8"] = true
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| 
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| 	pmh := DevTreeNode{
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| 		Chip: "ec/lenovo/pmh7",
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| 		Registers: map[string]string{
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| 			"backlight_enable":  "0x01",
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| 			"dock_event_enable": "0x01",
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| 		},
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| 		Children: []DevTreeNode{
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| 			DevTreeNode{
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| 				Chip:    "pnp",
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| 				Comment: "dummy",
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| 				Dev:     0xff,
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| 				Func:    1,
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| 			},
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| 		},
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| 	}
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| 	PutChip("lpc", pmh)
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| 
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| 	ecs := ctx.InfoSource.GetEC()
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| 	h8 := DevTreeNode{
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| 		Chip: "ec/lenovo/h8",
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| 		Children: []DevTreeNode{
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| 			DevTreeNode{
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| 				Chip:    "pnp",
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| 				Comment: "dummy",
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| 				Dev:     0xff,
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| 				Func:    2,
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| 				IOs: map[uint16]uint16{
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| 					0x60: 0x62,
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| 					0x62: 0x66,
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| 					0x64: 0x1600,
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| 					0x66: 0x1604,
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| 				},
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| 			},
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| 		},
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| 		Comment: "FIXME: has_keyboard_backlight, has_power_management_beeps, has_uwb",
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| 		Registers: map[string]string{
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| 			"config0":   FormatHex8(ecs[0]),
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| 			"config1":   FormatHex8(ecs[1]),
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| 			"config2":   FormatHex8(ecs[2]),
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| 			"config3":   FormatHex8(ecs[3]),
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| 			"beepmask0": FormatHex8(ecs[4]),
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| 			"beepmask1": FormatHex8(ecs[5]),
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| 		},
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| 	}
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| 	for i := 0; i < 0x10; i++ {
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| 		if ecs[0x10+i] != 0 {
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| 			h8.Registers[fmt.Sprintf("event%x_enable", i)] = FormatHex8(ecs[0x10+i])
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| 		}
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| 	}
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| 	PutChip("lpc", h8)
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| 
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| 	eeprom := DevTreeNode{
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| 		Chip:    "drivers/i2c/at24rf08c",
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| 		Comment: "eeprom, 8 virtual devices, same chip",
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| 		Children: []DevTreeNode{
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| 			DevTreeNode{
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| 				Chip: "i2c",
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| 				Dev:  0x54,
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| 			},
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| 			DevTreeNode{
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| 				Chip: "i2c",
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| 				Dev:  0x55,
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| 			},
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| 			DevTreeNode{
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| 				Chip: "i2c",
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| 				Dev:  0x56,
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| 			},
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| 			DevTreeNode{
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| 				Chip: "i2c",
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| 				Dev:  0x57,
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| 			},
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| 			DevTreeNode{
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| 				Chip: "i2c",
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| 				Dev:  0x5c,
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| 			},
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| 			DevTreeNode{
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| 				Chip: "i2c",
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| 				Dev:  0x5d,
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| 			},
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| 			DevTreeNode{
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| 				Chip: "i2c",
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| 				Dev:  0x5e,
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| 			},
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| 			DevTreeNode{
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| 				Chip: "i2c",
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| 				Dev:  0x5f,
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| 			},
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| 		},
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| 	}
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| 	PutChip("smbus", eeprom)
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| }
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