83b991afff
- Support for compiling romcc on non x86 platforms - new romc options -msse and -mmmx for specifying extra registers to use - Bug fixes to device the device disable/enable framework and an amd8111 implementation - Move the link specification to the chip specification instead of the path - Allow specifying devices with internal bridges. - Initial via epia support - Opteron errata fixes git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
36 lines
954 B
C
36 lines
954 B
C
#include "linux_syscall.h"
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#include "linux_console.h"
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static void main(void)
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{
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static const int cpu[] = { 0, 1, 2, 3 };
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int i;
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for(i = 0; i < sizeof(cpu)/sizeof(cpu[0]); i++) {
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static const unsigned int register_values[] = {
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0x0000c144, 0x0000f8f8, 0x00000000,
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0x0000c14C, 0x0000f8f8, 0x00000001,
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0x0000c154, 0x0000f8f8, 0x00000002,
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0x0000c15C, 0x0000f8f8, 0x00000003,
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0x0000c164, 0x0000f8f8, 0x00000004,
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0x0000c16C, 0x0000f8f8, 0x00000005,
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0x0000c174, 0x0000f8f8, 0x00000006,
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0x0000c17C, 0x0000f8f8, 0x00000007,
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};
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int j;
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int max = sizeof(register_values)/sizeof(register_values[0]);
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for(j = 0; j < max; j += 3) {
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print_debug("val[");
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print_debug_hex8(j);
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print_debug("]: ");
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print_debug_hex32(register_values[j]);
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print_debug_char(' ');
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print_debug_hex32(register_values[j+1]);
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print_debug_char(' ');
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print_debug_hex32(register_values[j+2]);
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print_debug_char('\n');
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}
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}
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_exit(0);
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}
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