This patch introduces x86_64 (64-bit) support to the payload, building upon the existing x86 (32-bit) architecture. Files necessary for 64-bit compilation are now guarded by the `CONFIG_LP_ARCH_X86_64` Kconfig option. BUG=b:242829490 TEST=Able to verify all valid combinations between coreboot and payload with this patch. Payload Entry Point Behavior with below code. +----------------+--------------------+----------------------------+ | LP_ARCH_X86_64 | Payload Entry Mode | Description | +----------------+--------------------+----------------------------+ | No | 32-bit | Direct protected mode init | +----------------+--------------------+----------------------------+ | Yes | 32-bit | Protected to long mode | +----------------+--------------------+----------------------------+ | Yes | 64-bit | Long mode initialization | +----------------+--------------------+----------------------------+ Change-Id: I69fda47bedf1a14807b1515c4aed6e3a1d5b8585 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81968 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
		
			
				
	
	
		
			142 lines
		
	
	
		
			3.7 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			142 lines
		
	
	
		
			3.7 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
| /*
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|  *
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|  * Copyright (C) 2024 Google Inc.
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|  *
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|  * Redistribution and use in source and binary forms, with or without
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|  * modification, are permitted provided that the following conditions
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|  * are met:
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|  * 1. Redistributions of source code must retain the above copyright
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|  *    notice, this list of conditions and the following disclaimer.
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|  * 2. Redistributions in binary form must reproduce the above copyright
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|  *    notice, this list of conditions and the following disclaimer in the
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|  *    documentation and/or other materials provided with the distribution.
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|  * 3. The name of the author may not be used to endorse or promote products
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|  *    derived from this software without specific prior written permission.
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|  *
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|  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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|  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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|  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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|  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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|  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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|  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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|  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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|  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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|  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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|  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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|  * SUCH DAMAGE.
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|  */
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| 
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| #define IA32_EFER	0xC0000080
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| #define  EFER_LME	(1 << 8)
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| 
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| 	.code32
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| 	.global _entry
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| 	.section .text._entry
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| 	.align 4
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| 
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| /*
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|  * WARNING: Critical Code Section - 32/64-bit Compatibility
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|  * This code between `_entry` and `jnz _init64` is executed during system initialization.
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|  * It MUST function correctly regardless of whether the system is booting in:
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|  *   - 32-bit protected mode
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|  *   - 64-bit long mode
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|  * To achieve this, ONLY use instructions that produce identical binary output in both modes.
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|  * Thoroughly test ALL modifications to this section in BOTH 32-bit and 64-bit boot
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|  * environments.
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|  */
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| 
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| _entry:
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| 
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| 	/* Add multiboot header and jump around it when building with multiboot support. */
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| #if CONFIG(LP_MULTIBOOT)
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| 	#include "multiboot_header.inc"
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| #endif
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| 	/* No interrupts, please. */
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| 	cli
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| 
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| 	movl $IA32_EFER, %ecx
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| 	rdmsr
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| 	testl $EFER_LME, %eax
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| 	jnz _init64
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| 
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| 	lgdt %cs:gdt_ptr
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| 
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| 	/* save pointer to coreboot tables */
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| 	movl 4(%esp), %eax
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| 	/*
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| 	 * NOTE: coreboot tables has passed over the top of the stack
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| 	 * while calling in protected mode.
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| 	 */
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| 	movl %eax, cb_header_ptr
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| 
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| 	call init_page_table
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| 	movl $pm4le, %eax
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| 
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| 	/* load identity mapped page tables */
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| 	movl %eax, %cr3
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| 
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| 	/* enable PAE */
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| 	movl %cr4, %eax
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| 	btsl $5, %eax
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| 	movl %eax, %cr4
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| 
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| 	/* enable long mode */
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| 	movl $(IA32_EFER), %ecx
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| 	rdmsr
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| 	btsl $8, %eax
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| 	wrmsr
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| 
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| 	/* enable paging */
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| 	movl %cr0, %eax
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| 	btsl $31, %eax
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| 	movl %eax, %cr0
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| 
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| 	/* Jump to selgdt 0x20, flat x64 code segment */
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| 	ljmp $0x20, $_entry64
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| 
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| .code64
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| .align 16
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| _init64:
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| 	movabs	$gdt_ptr, %rax
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| 	lgdt	(%rax)
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| 
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| 	/*
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| 	 * Note: The `cb_header_ptr` has passed as the first argument
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| 	 * to the x86-64 calling convention.
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| 	 */
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| 	movq %rdi, cb_header_ptr
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| 
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| 	call init_page_table
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| 	movq $pm4le, %rax
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| 
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| 	/* load identity mapped page tables */
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| 	movq %rax, %cr3
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| 
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| _entry64:
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| 	/* Store current stack pointer and set up new stack. */
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| 	movq %rsp, %rax
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| 	movabs	$_estack, %rsp
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| 
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| 	push %rax
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| 
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| 	fninit
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| 	movq %cr0, %rax
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| 	andq $0xFFFFFFFFFFFFFFFB, %rax	/* clear EM */
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| 	orq $0x00000022, %rax	/* set MP, NE */
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| 	movq %rax, %cr0
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| 
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| 	movq %cr4, %rax
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| 	orq $0x00000600, %rax	/* set OSFXSR, OSXMMEXCPT */
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| 	movq %rax, %cr4
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| 
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| 	/* Let's rock. */
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| 	call start_main
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| 
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| 	/* %rax has the return value - pass it on unmolested */
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| _leave:
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| 	/* Restore old stack. */
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| 	pop %rsp
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| 
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| 	/* Return to the original context. */
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| 	ret
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