d9802f3703
The Infineon TPM chip used on these platforms doesn't use an IRQ line; the Linux kernel has been patched to work around this, but better to remove it completely. Test: boot linux on google/wolf,lulu,cyan without tpm_tis.interrupts=0 kernel parameter, observe no abnormal delays in boot or resume from S3. Change-Id: Id510c73cfdc14b7f82b0cc695691b55423185a0b Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/22582 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
164 lines
3.8 KiB
Plaintext
164 lines
3.8 KiB
Plaintext
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007-2009 coresystems GmbH
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* Copyright (C) 2013 Google Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/* Intel LPC Bus Device - 0:1f.0 */
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Device (LPCB)
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{
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Name(_ADR, 0x001f0000)
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#include "irqlinks.asl"
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#include "acpi/ec.asl"
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Device (DMAC) /* DMA Controller */
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{
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Name(_HID, EISAID("PNP0200"))
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Name(_CRS, ResourceTemplate()
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{
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IO (Decode16, 0x00, 0x00, 0x01, 0x20)
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IO (Decode16, 0x81, 0x81, 0x01, 0x11)
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IO (Decode16, 0x93, 0x93, 0x01, 0x0d)
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IO (Decode16, 0xc0, 0xc0, 0x01, 0x20)
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DMA (Compatibility, NotBusMaster, Transfer8_16) { 4 }
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})
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}
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Device (FWH) /* Firmware Hub */
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{
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Name (_HID, EISAID("INT0800"))
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Name (_CRS, ResourceTemplate()
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{
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Memory32Fixed(ReadOnly, 0xff000000, 0x01000000)
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})
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}
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Device (HPET)
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{
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Name (_HID, EISAID("PNP0103"))
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Name (_CID, 0x010CD041)
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Method (_STA, 0) /* Device Status */
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{
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Return (0xf) /* Enable and show device */
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}
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Name(_CRS, ResourceTemplate()
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{
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Memory32Fixed(ReadOnly, 0xfed00000, 0x400)
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})
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}
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Device(PIC) /* 8259 Interrupt Controller */
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{
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Name(_HID,EISAID("PNP0000"))
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Name(_CRS, ResourceTemplate()
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{
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IO (Decode16, 0x20, 0x20, 0x01, 0x02)
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IO (Decode16, 0x24, 0x24, 0x01, 0x02)
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IO (Decode16, 0x28, 0x28, 0x01, 0x02)
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IO (Decode16, 0x2c, 0x2c, 0x01, 0x02)
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IO (Decode16, 0x30, 0x30, 0x01, 0x02)
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IO (Decode16, 0x34, 0x34, 0x01, 0x02)
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IO (Decode16, 0x38, 0x38, 0x01, 0x02)
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IO (Decode16, 0x3c, 0x3c, 0x01, 0x02)
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IO (Decode16, 0xa0, 0xa0, 0x01, 0x02)
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IO (Decode16, 0xa4, 0xa4, 0x01, 0x02)
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IO (Decode16, 0xa8, 0xa8, 0x01, 0x02)
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IO (Decode16, 0xac, 0xac, 0x01, 0x02)
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IO (Decode16, 0xb0, 0xb0, 0x01, 0x02)
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IO (Decode16, 0xb4, 0xb4, 0x01, 0x02)
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IO (Decode16, 0xb8, 0xb8, 0x01, 0x02)
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IO (Decode16, 0xbc, 0xbc, 0x01, 0x02)
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IO (Decode16, 0x4d0, 0x4d0, 0x01, 0x02)
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IRQNoFlags () { 2 }
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})
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}
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Device(LDRC) /* LPC device: Resource consumption */
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{
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Name (_HID, EISAID("PNP0C02"))
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Name (_UID, 2)
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Name (RBUF, ResourceTemplate()
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{
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IO (Decode16, 0x61, 0x61, 0x1, 0x01) /* NMI Status */
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IO (Decode16, 0x63, 0x63, 0x1, 0x01) /* CPU Reserved */
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IO (Decode16, 0x65, 0x65, 0x1, 0x01) /* CPU Reserved */
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IO (Decode16, 0x67, 0x67, 0x1, 0x01) /* CPU Reserved */
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IO (Decode16, 0x80, 0x80, 0x1, 0x01) /* Port 80 Post */
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IO (Decode16, 0x92, 0x92, 0x1, 0x01) /* CPU Reserved */
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IO (Decode16, 0xb2, 0xb2, 0x1, 0x02) /* SWSMI */
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})
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Method (_CRS, 0, NotSerialized)
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{
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Return (RBUF)
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}
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}
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Device (RTC) /* Real Time Clock */
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{
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Name (_HID, EISAID("PNP0B00"))
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Name (_CRS, ResourceTemplate()
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{
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IO (Decode16, 0x70, 0x70, 1, 8)
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/*
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* Disable as Windows doesn't like it, and systems don't seem to use it.
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* IRQNoFlags() { 8 }
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*/
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})
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}
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Device (TIMR) /* Intel 8254 timer */
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{
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Name(_HID, EISAID("PNP0100"))
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Name(_CRS, ResourceTemplate()
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{
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IO (Decode16, 0x40, 0x40, 0x01, 0x04)
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IO (Decode16, 0x50, 0x50, 0x10, 0x04)
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IRQNoFlags() {0}
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})
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}
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/* Include mainboard's superio.asl file. */
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#include "acpi/superio.asl"
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#if IS_ENABLED(CONFIG_LPC_TPM)
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Device (TPM) /* Trusted Platform Module */
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{
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Name(_HID, EISAID("IFX0102"))
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Name(_CID, 0x310cd041)
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Name(_UID, 1)
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Method(_STA, 0)
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{
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If (TPMP) {
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Return (0xf)
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}
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Return (0x0)
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}
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Name(_CRS, ResourceTemplate() {
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IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)
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IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)
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Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
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})
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}
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#endif
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}
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