6f3a53b6f6
SBI calls, as it turned out, were never right. They did not set the stack correctly on traps. They were not correctly setting the MIP instead of the SIP (although this was not really well documented). On Harvey, we were trying to avoid using them, and due to a bug in SPIKE, our avoidance worked. Once SPIKE was fixed, our avoidance broke. This set of changes is tested and working with Harvey which, for the first time, is making SBI calls. It's not pretty and we're going to want to rework trap_util.S in coming days. Change-Id: Ibef530adcc58d33e2c44ff758e0b7d2acbdc5e99 Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/18097 Tested-by: build bot (Jenkins)
58 lines
1.3 KiB
ArmAsm
58 lines
1.3 KiB
ArmAsm
/*
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* Early initialization code for RISC-V
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*
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* Copyright 2013 Google Inc.
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* Copyright 2016 Jonathan Neuschäfer <j.neuschaefer@gmx.net>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
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* GNU General Public License for more details.
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*/
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#include <arch/encoding.h>
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#include <mcall.h>
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.section ".text._start", "ax", %progbits
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.globl _stack
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.global _estack
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.globl _start
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_start:
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# N.B. This only works on low 4G of the address space
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# and the stack must be page-aligned.
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la sp, _estack
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# poison the stack
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la t1, _stack
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li t0, 0xdeadbeef
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sd t0, 0(t1)
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# make room for HLS and initialize it
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addi sp, sp, -HLS_SIZE
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// Once again, the docs and toolchain disagree.
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// Rather than get fancy I'll just lock this down
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// until it all stabilizes.
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//csrr a0, mhartid
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csrr a0, 0xf14
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call hls_init
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la t0, trap_entry
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csrw mtvec, t0
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# clear any pending interrupts
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csrwi mip, 0
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# set up the mstatus register for VM
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call mstatus_init
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tail main
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