dc12a3817a
Call setup_opensil, opensil_entry, and fch_init in the right order from the init method of the SoC's chip operations. This brings this SoC both more in line with the other SoCs and avoids using boot state hooks for this which also makes the sequence in which those functions are called easier to understand. Previously the boot states were used so that setup_opensil was run before configure_mpio which was run before opensil_entry(SIL_TP1), but since configure_mpio is called from setup_opensil, this is no longer necessary. TEST=Onyx still boots to the payload and the MPIO configuration reported from the openSIL code is still the same. The FCH init code now runs before the resource allocation like on the AMD SoCs that rely on FSP. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ic752635da5eaa9e333cfb927836f0d260d2ac049 Reviewed-on: https://review.coreboot.org/c/coreboot/+/79985 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
28 lines
563 B
C
28 lines
563 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <device/device.h>
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#include <soc/southbridge.h>
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#include <soc/acpi.h>
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#include <soc/southbridge.h>
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#include <vendorcode/amd/opensil/genoa_poc/opensil.h>
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static void soc_init(void *chip_info)
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{
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default_dev_ops_root.write_acpi_tables = soc_acpi_write_tables;
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setup_opensil();
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opensil_entry(SIL_TP1);
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fch_init(chip_info);
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}
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static void soc_final(void *chip_info)
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{
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}
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struct chip_operations soc_amd_genoa_poc_ops = {
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CHIP_NAME("AMD Genoa SoC Proof of Concept")
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.init = soc_init,
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.final = soc_final,
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};
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