Old igd.asl had inconsistent addresses (between _DOD and actual device) and ghost devices. Any of those is enough to make brightness on windows fail and make igd.asl out-of-ACPI-spec. Also old code favoured ridiculous copying of the same thing 6 times per chipset. Leave only hooking up and chipset-specific part in chipset directory. Move NVS handling and ACPI-spec parts to a common file. Change-Id: I556769e5e28b83e7465e3db689e26c8c0ab44757 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7472 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com> Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
127 lines
4.3 KiB
Plaintext
127 lines
4.3 KiB
Plaintext
##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2007-2009 coresystems GmbH
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##
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## This program is free software; you can redistribute it and/or
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## modify it under the terms of the GNU General Public License as
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## published by the Free Software Foundation; version 2 of
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## the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc.
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##
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chip northbridge/intel/i945
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# IGD Displays
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register "gfx.ndid" = "3"
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register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
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device cpu_cluster 0 on
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chip cpu/intel/socket_mFCPGA478
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device lapic 0 on end
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end
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end
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device domain 0 on
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subsystemid 0x4352 0x6886 inherit
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device pci 00.0 on end # host bridge
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# auto detection:
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#device pci 01.0 off end # i945 PCIe root port
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device pci 02.0 on end # vga controller
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device pci 02.1 on end # display controller
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chip southbridge/intel/i82801gx
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register "pirqa_routing" = "0x0b"
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register "pirqb_routing" = "0x0b"
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register "pirqc_routing" = "0x0b"
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register "pirqd_routing" = "0x0b"
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register "pirqe_routing" = "0x80"
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register "pirqf_routing" = "0x80"
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register "pirqg_routing" = "0x0b"
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register "pirqh_routing" = "0x0b"
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# GPI routing
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# 0 No effect (default)
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# 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
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# 2 SCI (if corresponding GPIO_EN bit is also set)
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register "gpi13_routing" = "2"
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register "gpi8_routing" = "1"
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register "gpi7_routing" = "2"
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register "gpe0_en" = "0x20800007"
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register "c3_latency" = "0x23"
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register "docking_supported" = "1"
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register "p_cnt_throttling_supported" = "1"
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register "ide_legacy_combined" = "0x1"
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register "ide_enable_primary" = "0x1"
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register "ide_enable_secondary" = "0x0"
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register "sata_ahci" = "0x0"
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device pci 1b.0 on end # High Definition Audio
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device pci 1c.0 on end # PCIe
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device pci 1c.1 on end # PCIe
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device pci 1c.2 on end # PCIe
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#device pci 1c.3 off end # PCIe port 4
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#device pci 1c.4 off end # PCIe port 5
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#device pci 1c.5 off end # PCIe port 6
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device pci 1d.0 on end # USB UHCI
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device pci 1d.1 on end # USB UHCI
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device pci 1d.2 on end # USB UHCI
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device pci 1d.3 on end # USB UHCI
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device pci 1d.7 on end # USB2 EHCI
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device pci 1e.0 on
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chip southbridge/ti/pci7420
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register "smartcard_enabled" = "0x0"
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device pci 3.0 on end
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device pci 3.1 on end
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device pci 3.2 on end
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device pci 3.3 off end # smartcard
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end
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end # PCI bridge
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#device pci 1e.2 off end # AC'97 Audio
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#device pci 1e.3 off end # AC'97 Modem
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device pci 1f.0 on # LPC bridge
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chip superio/smsc/lpc47n227
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device pnp 2e.1 on # Parallel port
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io 0x60 = 0x378
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irq 0x70 = 5
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end
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device pnp 2e.2 on # COM1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.3 on # COM2
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io 0x60 = 0x2f8
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irq 0x70 = 3
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end
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device pnp 2e.5 off # Keyboard+Mouse
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# io 0x60 = 0x60
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# io 0x62 = 0x64
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# irq 0x70 = 1
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# irq 0x72 = 12
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end
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end
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chip superio/renesas/m3885x
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device pnp ff.1 on # dummy address
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end
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end
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chip ec/acpi
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end
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end
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#device pci 1f.1 off end # IDE
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device pci 1f.2 on end # SATA
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device pci 1f.3 on end # SMBus
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#device pci 1f.4 off end # Realtek ID Codec
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end
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end
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end
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