4229dfc215
BUG=b:154071868 BRANCH=none TEST=none Change-Id: Iae4fe48b6a3df730b2334cb1f32b35addc90bec0 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42674 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
116 lines
3.2 KiB
C
116 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <baseboard/gpio.h>
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#include <baseboard/variants.h>
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#include <commonlib/helpers.h>
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static const struct pad_config gpio_table[] = {
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/* A16 : SD_OC_ODL */
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PAD_CFG_GPI(GPP_A16, NONE, DEEP),
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/* A18 : LAN_PE_ISOLATE_ODL */
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PAD_CFG_GPO(GPP_A18, 1, DEEP),
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/* A23 : M2_WLAN_INT_ODL */
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PAD_CFG_GPI_APIC(GPP_A23, NONE, PLTRST, LEVEL, INVERT),
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/* B5 : LAN_CLKREQ_ODL */
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PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1),
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/* C0 : SMBCLK */
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PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
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/* C1 : SMBDATA */
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PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
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/* C6: M2_WLAN_WAKE_ODL */
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PAD_CFG_GPI_SCI_LOW(GPP_C6, NONE, DEEP, EDGE_SINGLE),
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/* C7 : LAN_WAKE_ODL */
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PAD_CFG_GPI_SCI_LOW(GPP_C7, NONE, DEEP, EDGE_SINGLE),
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/* C10 : PCH_PCON_RST_ODL */
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PAD_CFG_GPO(GPP_C10, 1, DEEP),
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/* C11 : PCH_PCON_PDB_ODL */
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PAD_CFG_GPO(GPP_C11, 1, DEEP),
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/* C15 : WLAN_OFF_L */
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PAD_CFG_GPO(GPP_C15, 1, DEEP),
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/* E2 : EN_PP_MST_OD */
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PAD_CFG_GPO(GPP_E2, 1, DEEP),
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/* E9 : USB_A0_OC_ODL */
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PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1),
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/* E10 : USB_A1_OC_ODL */
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PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1),
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/* F11 : EMMC_CMD */
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PAD_CFG_NF(GPP_F11, NONE, DEEP, NF1),
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/* F12 : EMMC_DATA0 */
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PAD_CFG_NF(GPP_F12, NONE, DEEP, NF1),
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/* F13 : EMMC_DATA1 */
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PAD_CFG_NF(GPP_F13, NONE, DEEP, NF1),
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/* F14 : EMMC_DATA2 */
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PAD_CFG_NF(GPP_F14, NONE, DEEP, NF1),
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/* F15 : EMMC_DATA3 */
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PAD_CFG_NF(GPP_F15, NONE, DEEP, NF1),
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/* F16 : EMMC_DATA4 */
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PAD_CFG_NF(GPP_F16, NONE, DEEP, NF1),
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/* F17 : EMMC_DATA5 */
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PAD_CFG_NF(GPP_F17, NONE, DEEP, NF1),
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/* F18 : EMMC_DATA6 */
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PAD_CFG_NF(GPP_F18, NONE, DEEP, NF1),
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/* F19 : EMMC_DATA7 */
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PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
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/* F20 : EMMC_RCLK */
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PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1),
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/* F21 : EMMC_CLK */
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PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1),
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/* F22 : EMMC_RST_L */
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PAD_CFG_NF(GPP_F22, NONE, DEEP, NF1),
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/* H4: PCH_I2C_PCON_SDA */
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PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
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/* H5: PCH_I2C_PCON_SCL */
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PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
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/* H22 : PWM_PP3300_BIOZZER */
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PAD_CFG_GPO(GPP_H22, 0, DEEP),
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};
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const struct pad_config *override_gpio_table(size_t *num)
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{
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*num = ARRAY_SIZE(gpio_table);
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return gpio_table;
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}
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/* Early pad configuration in bootblock */
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static const struct pad_config early_gpio_table[] = {
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/* B14 : GPP_B14_STRAP */
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PAD_NC(GPP_B14, NONE),
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/* B22 : GPP_B22_STRAP */
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PAD_NC(GPP_B22, NONE),
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/* E19 : GPP_E19_STRAP */
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PAD_NC(GPP_E19, NONE),
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/* E21 : GPP_E21_STRAP */
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PAD_NC(GPP_E21, NONE),
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/* B15 : H1_SLAVE_SPI_CS_L */
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PAD_CFG_NF(GPP_B15, NONE, DEEP, NF1),
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/* B16 : H1_SLAVE_SPI_CLK */
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PAD_CFG_NF(GPP_B16, NONE, DEEP, NF1),
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/* B17 : H1_SLAVE_SPI_MISO_R */
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PAD_CFG_NF(GPP_B17, NONE, DEEP, NF1),
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/* B18 : H1_SLAVE_SPI_MOSI_R */
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PAD_CFG_NF(GPP_B18, NONE, DEEP, NF1),
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/* C14 : BT_DISABLE_L */
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PAD_CFG_GPO(GPP_C14, 0, DEEP),
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/* PCH_WP_OD */
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PAD_CFG_GPI(GPP_C20, NONE, DEEP),
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/* C21 : H1_PCH_INT_ODL */
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PAD_CFG_GPI_APIC(GPP_C21, NONE, PLTRST, LEVEL, INVERT),
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/* C23 : WLAN_PE_RST# */
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PAD_CFG_GPO(GPP_C23, 1, DEEP),
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/* E1 : M2_SSD_PEDET */
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PAD_CFG_NF(GPP_E1, NONE, DEEP, NF1),
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/* E5 : SATA_DEVSLP1 */
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PAD_CFG_NF(GPP_E5, NONE, PLTRST, NF1),
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};
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const struct pad_config *variant_early_gpio_table(size_t *num)
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{
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*num = ARRAY_SIZE(early_gpio_table);
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return early_gpio_table;
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}
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