Kyösti Mälkki de64078102 bootblock: Provide some common prototypes ...

The split of bootblock initialisation to cpu, northbridge and
southbridge is not specific to intel at all, create new header
<arch/bootblock.h> as AMD will want some of these too.

Change-Id: I702cc6bad4afee4f61acf58b9155608b28eb417e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37429
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

2019-12-14 14:08:57 +00:00

..

acpi

nb/intel: Use defined DEFAULT_RCBA

2019-11-04 13:13:13 +00:00

acpi.c

northbridge/intel/pineview: Add remaining boilerplate code for northbridge

2015-12-02 00:26:36 +01:00

bootblock.c

bootblock: Provide some common prototypes

2019-12-14 14:08:57 +00:00

chip.h

src/northbridge: Add and update license headers

2018-05-29 22:36:37 +00:00

early_init.c

sb/intel/i82801gx: Add common early code

2019-11-14 11:30:09 +00:00

gma.c

src/northbridge: Add missing 'include <types.h>'

2019-05-29 20:28:27 +00:00

iomap.h

Remove DEFAULT_PCIEXBAR alias

2019-03-06 11:54:17 +00:00

Kconfig

Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol

2019-11-25 09:17:38 +00:00

Makefile.inc

northbridge/intel: Rename ram_calc.c to memmap.c

2019-08-07 05:42:15 +00:00

memmap.c

lib/cbmem_top: Add a common cbmem_top implementation

2019-11-01 11:44:51 +00:00

northbridge.c

src: Remove unused '#include <cpu/cpu.h>'

2019-10-28 11:56:38 +00:00

pineview.h

intel/pci: Utilise pci_def.h for PCI_BRIDGE_CONTROL

2019-10-01 01:54:08 +00:00

raminit.c

sb/intel/nm10: Fix enabling HPET

2019-10-06 22:11:32 +00:00

raminit.h

northbridge/intel/pineview: Add native raminit

2015-12-02 00:26:45 +01:00

romstage.c

sb/intel/i82801gx: Add common early code

2019-11-14 11:30:09 +00:00