79f065a79d
Adjust the memory map to allocate MMIO from non-memory addresses. TEST=None Change-Id: Icb6863665c466e8609af73eb9338165c7d6f46bf Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/13856 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
85 lines
2.3 KiB
C
85 lines
2.3 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007-2009 coresystems GmbH
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* Copyright (C) 2014 Google Inc.
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* Copyright (C) 2015 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <cbmem.h>
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#include <console/console.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <soc/iomap.h>
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#include <soc/ramstage.h>
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#define RES_IN_KIB(r) ((r) >> 10)
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static void nc_read_resources(device_t dev)
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{
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unsigned long base_k;
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int index = 0;
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unsigned long size_k;
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/* Read standard PCI resources. */
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pci_dev_read_resources(dev);
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/* 0 -> 0xa0000 */
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base_k = 0;
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size_k = 0xa0000 - base_k;
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ram_resource(dev, index++, RES_IN_KIB(base_k), RES_IN_KIB(size_k));
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/*
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* Reserve everything between A segment and 1MB:
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*
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* 0xa0000 - 0xbffff: legacy VGA
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* 0xc0000 - 0xdffff: RAM
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* 0xe0000 - 0xfffff: ROM shadow
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*/
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base_k += size_k;
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size_k = 0xc0000 - base_k;
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mmio_resource(dev, index++, RES_IN_KIB(base_k), RES_IN_KIB(size_k));
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base_k += size_k;
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size_k = 0x100000 - base_k;
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reserved_ram_resource(dev, index++, RES_IN_KIB(base_k),
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RES_IN_KIB(size_k));
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/* 0x100000 -> cbmem_top - cacheable and usable */
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base_k += size_k;
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size_k = (unsigned long)cbmem_top() - base_k;
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ram_resource(dev, index++, RES_IN_KIB(base_k), RES_IN_KIB(size_k));
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/* cbmem_top -> 0xc0000000 - reserved */
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base_k += size_k;
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size_k = 0xc0000000 - base_k;
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reserved_ram_resource(dev, index++, RES_IN_KIB(base_k),
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RES_IN_KIB(size_k));
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/* 0xc0000000 -> 4GiB is mmio. */
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base_k += size_k;
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size_k = 0x100000000ull - base_k;
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mmio_resource(dev, index++, RES_IN_KIB(base_k), RES_IN_KIB(size_k));
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}
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static struct device_operations nc_ops = {
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.read_resources = &nc_read_resources,
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.set_resources = &pci_dev_set_resources,
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.enable_resources = &pci_dev_enable_resources,
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};
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static const struct pci_driver systemagent_driver __pci_driver = {
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.ops = &nc_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.device = QUARK_MC_DEVICE_ID
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};
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