Angel Pons e12de372d7 sb/intel: Factor out irqlinks.asl ...

Files are identical for all southbridges, except bd82x6x. We will take
care of that in subsequent commits.

Change-Id: I38e5d440e188d26f8997bc22a956187b728487ca
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43157
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

2020-07-08 22:12:44 +00:00

..

acpi

acpigen: Add acpigen_notify

2020-07-07 20:31:22 +00:00

arch

arch/x86: Add memmove.c to x86 bootblock

2020-07-08 21:06:47 +00:00

commonlib

lib/coreboot_table: Add Intel FSP version to coreboot table

2020-07-04 11:20:08 +00:00

console

console: Update for vboot before bootblock

2020-06-15 22:07:12 +00:00

cpu

ACPI: Add and fill gnvs_ptr for smm_runtime

2020-07-08 07:32:51 +00:00

device

Kconfig: Escape variable to accommodate new Kconfig versions

2020-06-19 15:29:04 +00:00

drivers

dptf: Add support for IDSP

2020-07-07 17:23:47 +00:00

ec

ec/google: Add function ec_fill_dptf_helpers()

2020-07-07 20:31:30 +00:00

include

ACPI: Add and fill gnvs_ptr for smm_runtime

2020-07-08 07:32:51 +00:00

lib

lib: Temporarily remove timestamps from psp_verstage

2020-07-08 19:37:50 +00:00

mainboard

mb/google/zork: Enable psp_verstage

2020-07-08 21:06:34 +00:00

northbridge

nb/intel/pineview/acpi: Remove unmatched comment start

2020-07-08 22:10:21 +00:00

security

security/vboot: Allow files to go into only RW-A or RW-B region

2020-07-08 19:36:24 +00:00

soc

soc/amd/picasso: Update APOB size & base generation

2020-07-08 21:07:00 +00:00

southbridge

sb/intel: Factor out irqlinks.asl

2020-07-08 22:12:44 +00:00

superio

superio/winbond/w83977tf: Add suspend related fields

2020-06-16 20:17:26 +00:00

vendorcode

vendorcode/intel/fsp/fsp2_0/cpx_sp: Update to FSP ww26 release and adapt soc

2020-07-07 22:24:41 +00:00

Kconfig

arch/x86: Remove RELOCATABLE_RAMSTAGE

2020-07-06 06:17:47 +00:00