system76-coreboot

Files

Stefan Reinauer 8a36634388 Don't pre-enable SATA AHCI in romstage.c

In a recent commit the SATA code of Panther Point / Cougar Point was
changed to enable AHCI mode depending on the device tree settings rather
than a hard code hidden in romstage.c. However, Emerald Lake 2 was not
fixed up accordingly.

Change-Id: I6c93f386509361e1ab5565b0e4d0e84f0ba282a2
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/995
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

2012-05-03 20:34:44 +02:00

arch/x86

Print some useful debugging information in PSS table creation

2012-05-03 20:34:05 +02:00

boot

Make timestamp collection conditional in hardwaremain.c

2012-04-24 18:19:54 +02:00

console

Add support to run SMM handler in TSEG instead of ASEG

2012-04-04 04:49:09 +02:00

cpu

Fix register corruption during Intel Microcode update