e27c013f39
Console init in bootblock will be done in a separate CL. Change-Id: Ia2405013f262d904aa82be323e928223dbb4296c Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36795 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
43 lines
1.1 KiB
Makefile
43 lines
1.1 KiB
Makefile
##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2008-2009 coresystems GmbH
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_I82801GX),y)
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bootblock-y += early_init.c
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bootblock-y += bootblock.c
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ramstage-y += i82801gx.c
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ramstage-y += ac97.c
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ramstage-y += azalia.c
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ramstage-y += ide.c
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ramstage-y += lpc.c
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ramstage-y += nic.c
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ramstage-y += pci.c
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ramstage-y += pcie.c
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ramstage-y += sata.c
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ramstage-y += smbus.c
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ramstage-y += usb.c
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ramstage-y += usb_ehci.c
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ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c
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smm-y += smihandler.c
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romstage-y += early_init.c
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romstage-y += early_smbus.c
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romstage-y += early_cir.c
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endif
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