42fb3164ed
Here's a patch which makes all "option ROM_SIZE" lines use x*y format which is a lot easier to read and modify, without having to use your brain or a calculator ;-) Tested with abuild, no errors. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2398 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
82 lines
1.8 KiB
Plaintext
82 lines
1.8 KiB
Plaintext
# Config file for Embedded Planet EP405PC board
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# This will make a target directory of ./ep405pc
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target ep405pc
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mainboard embeddedplanet/ep405pc
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romimage "normal"
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## Enable PPC405 instructions
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option CPU_OPT="-mcpu=405"
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## use a cross compiler
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#option CROSS_COMPILE="powerpc-ibm-eabi-"
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## Use stage 1 initialization code
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option CONFIG_USE_INIT=1
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## Use chip configuration
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option CONFIG_CHIP_CONFIGURE=1
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## We don't use compressed image
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option CONFIG_COMPRESS=0
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## Turn off POST codes
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option NO_POST=1
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## Enable serial console
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option DEFAULT_CONSOLE_LOGLEVEL=8
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option CONFIG_CONSOLE_SERIAL8250=1
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# Divisor of 69 == 9600 baud due to weird clocking
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option TTYS0_DIV=69
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option TTYS0_BAUD=9600
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## Boot linux from IDE
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option CONFIG_IDE=1
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option CONFIG_FS_STREAM=1
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option CONFIG_FS_EXT2=1
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option CONFIG_FS_ISO9660=1
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option CONFIG_FS_FAT=1
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option AUTOBOOT_CMDLINE="hda1:/vmlinuz"
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option ROM_SIZE=1024*1024
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## Board has fixed size RAM
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option EMBEDDED_RAM_SIZE=64*1024*1024
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## LinuxBIOS C code runs at this location in RAM
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option _RAMBASE=0x00100000
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##
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## Use a 64K stack
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##
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option STACK_SIZE=0x10000
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##
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## Use a 64K heap
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##
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option HEAP_SIZE=0x10000
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##
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## System clock
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##
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option CONFIG_SYS_CLK_FREQ=33
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##
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option _ROMBASE=0xfff00000
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## Reset vector address
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option _RESET=0xfffffffc
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## Exception vectors
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option _EXCEPTION_VECTORS=_ROMBASE+0x100
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## linuxBIOS ROM start address
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option _ROMSTART=0xfff03000
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## linuxBIOS C code runs at this location in RAM
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option _RAMBASE=0x00100000
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end
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buildrom ./linuxbios.rom ROM_SIZE "normal"
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