a8843dee58
The coreboot sites support HTTPS, and requests over HTTP with SSL are also redirected. So use the more secure URLs, which also saves a request most of the times, as nothing needs to be redirected. Run the command below to replace all occurences. ``` $ git grep -l -E 'http://(www.|review.|)coreboot.org' | xargs sed -i 's,http://\(.*\)coreboot.org,https://\1coreboot.org,g' ``` Change-Id: If53f8b66f1ac72fb1a38fa392b26eade9963c369 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://review.coreboot.org/20034 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
71 lines
2.8 KiB
C
71 lines
2.8 KiB
C
/*****************************************************************************\
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* cmos_lowlevel.h
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*****************************************************************************
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* Copyright (C) 2002-2005 The Regents of the University of California.
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* Produced at the Lawrence Livermore National Laboratory.
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* Written by David S. Peterson <dsp@llnl.gov> <dave_peterson@pobox.com>.
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* UCRL-CODE-2003-012
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* All rights reserved.
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*
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* This file is part of nvramtool, a utility for reading/writing coreboot
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* parameters and displaying information from the coreboot table.
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* For details, see https://coreboot.org/nvramtool.
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*
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* Please also read the file DISCLAIMER which is included in this software
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* distribution.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License (as published by the
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* Free Software Foundation) version 2, dated June 1991.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the IMPLIED WARRANTY OF
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the terms and
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* conditions of the GNU General Public License for more details.
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\*****************************************************************************/
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#ifndef NVRAMTOOL_CMOS_LOWLEVEL_H
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#define NVRAMTOOL_CMOS_LOWLEVEL_H
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#include "common.h"
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#include "layout.h"
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typedef struct {
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void (*init)(void* data);
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unsigned char (*read)(unsigned addr);
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void (*write)(unsigned addr, unsigned char value);
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void (*set_iopl)(int level);
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} cmos_access_t;
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typedef enum { HAL_CMOS, HAL_MEMORY } hal_t;
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void select_hal(hal_t hal, void *data);
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#define CMOS_AREA_OUT_OF_RANGE (CMOS_RESULT_START + 0)
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#define CMOS_AREA_OVERLAPS_RTC (CMOS_RESULT_START + 1)
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#define CMOS_AREA_TOO_WIDE (CMOS_RESULT_START + 2)
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unsigned long long cmos_read(const cmos_entry_t * e);
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void cmos_write(const cmos_entry_t * e, unsigned long long value);
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unsigned char cmos_read_byte(unsigned index);
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void cmos_write_byte(unsigned index, unsigned char value);
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void cmos_read_all(unsigned char data[]);
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void cmos_write_all(unsigned char data[]);
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void set_iopl(int level);
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int verify_cmos_op(unsigned bit, unsigned length, cmos_entry_config_t config);
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#define CMOS_SIZE 256 /* size of CMOS memory in bytes */
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#define CMOS_RTC_AREA_SIZE 14 /* first 14 bytes control real time clock */
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/****************************************************************************
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* verify_cmos_byte_index
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*
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* Return 1 if 'index' does NOT specify a valid CMOS memory location. Else
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* return 0.
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****************************************************************************/
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static inline int verify_cmos_byte_index(unsigned index)
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{
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return (index < CMOS_RTC_AREA_SIZE) || (index >= CMOS_SIZE);
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}
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#endif /* NVRAMTOOL_CMOS_LOWLEVEL_H */
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