7011fa1135
Use the same function name as in soc/intel for this functionality. This also brings the function name more in line with the extended version of this function gpio_configure_pads_with_override which additionally supports passing a GPIO override configuration. This might cause some pain for out-of-tree boards, but at some point this should be made more consistent, so I don't see a too strong reason not to do this. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I88852e040f79861ce7d190bf2203f9e0ce156690 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57837 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
39 lines
974 B
C
39 lines
974 B
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <baseboard/variants.h>
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#include <console/console.h>
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#include <cpu/x86/smm.h>
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#include <ec/google/chromeec/ec.h>
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#include <ec/google/chromeec/smm.h>
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#include <elog.h>
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#include <variant/ec.h>
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void mainboard_smi_gpi(u32 gpi_sts)
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{
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printk(BIOS_WARNING, "No GPIO is set up as PAD_SMI, so %s should never end up being "
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"called. gpi_status is %x.\n", __func__, gpi_sts);
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}
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void mainboard_smi_sleep(u8 slp_typ)
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{
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size_t num_gpios;
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const struct soc_amd_gpio *gpios;
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chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS, MAINBOARD_EC_S5_WAKE_EVENTS);
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gpios = variant_sleep_gpio_table(&num_gpios);
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gpio_configure_pads(gpios, num_gpios);
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}
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int mainboard_smi_apmc(u8 apmc)
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{
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chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS, MAINBOARD_EC_SMI_EVENTS);
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return 0;
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}
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void elog_gsmi_cb_mainboard_log_wake_source(void)
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{
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google_chromeec_log_events(MAINBOARD_EC_LOG_EVENTS | MAINBOARD_EC_S0IX_WAKE_EVENTS);
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}
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