TEST=Able to build and boot ICLRVP platform. 1) Dump and disassemble DSDT to ensure GRXS function implementation remain unchanged prior and after this CL. 2) Verify no ACPI error seen while running 'dmesg' from console. 3) abuild --timeless to ensure there are no other functional changes. Change-Id: Iab4690341bc3da5d8eb249da4d407d84f7d4e706 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45680 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
122 lines
2.8 KiB
Plaintext
122 lines
2.8 KiB
Plaintext
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <intelblocks/gpio_defs.h>
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#include <soc/gpio_defs.h>
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#include <soc/irq.h>
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#include <soc/pcr_ids.h>
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Device (GPIO)
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{
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Name (_HID, "INT3455")
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Name (_UID, 0)
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Name (_DDN, "GPIO Controller")
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Name (RBUF, ResourceTemplate()
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{
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Memory32Fixed (ReadWrite, 0, 0, COM0)
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Memory32Fixed (ReadWrite, 0, 0, COM1)
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Memory32Fixed (ReadWrite, 0, 0, COM2)
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Memory32Fixed (ReadWrite, 0, 0, COM4)
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Memory32Fixed (ReadWrite, 0, 0, COM5)
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Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ)
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{ GPIO_IRQ14 }
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})
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Method (_CRS, 0, NotSerialized)
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{
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/* GPIO Community 0 */
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CreateDWordField (^RBUF, ^COM0._BAS, BAS0)
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CreateDWordField (^RBUF, ^COM0._LEN, LEN0)
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Store (^^PCRB (PID_GPIOCOM0), BAS0)
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Store (GPIO_BASE_SIZE, LEN0)
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/* GPIO Community 1 */
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CreateDWordField (^RBUF, ^COM1._BAS, BAS1)
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CreateDWordField (^RBUF, ^COM1._LEN, LEN1)
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Store (^^PCRB (PID_GPIOCOM1), BAS1)
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Store (GPIO_BASE_SIZE, LEN1)
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/* GPIO Community 2 */
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CreateDWordField (^RBUF, ^COM2._BAS, BAS2)
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CreateDWordField (^RBUF, ^COM2._LEN, LEN2)
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Store (^^PCRB (PID_GPIOCOM2), BAS2)
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Store (GPIO_BASE_SIZE, LEN2)
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/* GPIO Community 4 */
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CreateDWordField (^RBUF, ^COM4._BAS, BAS4)
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CreateDWordField (^RBUF, ^COM4._LEN, LEN4)
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Store (^^PCRB (PID_GPIOCOM4), BAS4)
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Store (GPIO_BASE_SIZE, LEN4)
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/* GPIO Community 5 */
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CreateDWordField (^RBUF, ^COM5._BAS, BAS5)
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CreateDWordField (^RBUF, ^COM5._LEN, LEN5)
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Store (^^PCRB (PID_GPIOCOM5), BAS5)
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Store (GPIO_BASE_SIZE, LEN5)
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Return (RBUF)
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}
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Method (_STA, 0, NotSerialized)
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{
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Return (0xF)
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}
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}
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/*
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* Get GPIO DW0 Address
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* Arg0 - GPIO Number
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*/
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Method (GADD, 1, NotSerialized)
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{
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/* GPIO Community 0 */
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If (LAnd (LGreaterEqual (Arg0, GPP_G0), LLessEqual (Arg0, GPP_A23)))
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{
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Store (PID_GPIOCOM0, Local0)
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Subtract (Arg0, GPP_A0, Local1)
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}
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/* GPIO Community 1 */
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If (LAnd (LGreaterEqual (Arg0, GPP_H0), LLessEqual (Arg0, GPP_F19)))
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{
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Store (PID_GPIOCOM1, Local0)
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Subtract (Arg0, GPP_D0, Local1)
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}
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/* GPIO Community 2 */
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If (LAnd (LGreaterEqual (Arg0, GPD0), LLessEqual (Arg0, GPD11)))
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{
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Store (PID_GPIOCOM2, Local0)
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Subtract (Arg0, GPD0, Local1)
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}
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/* GPIO Community 4 */
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If (LAnd (LGreaterEqual (Arg0, GPP_C0), LLessEqual (Arg0, GPP_E23)))
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{
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Store (PID_GPIOCOM4, Local0)
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Subtract (Arg0, GPP_C0, Local1)
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}
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/* GPIO Community 05*/
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If (LAnd (LGreaterEqual (Arg0, GPP_R0), LLessEqual (Arg0, GPP_S7)))
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{
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Store (PID_GPIOCOM5, Local0)
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Subtract (Arg0, GPP_R0, Local1)
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}
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Store (PCRB (Local0), Local2)
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Add (Local2, PAD_CFG_BASE, Local2)
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Return (Add (Local2, Multiply (Local1, 16)))
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}
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/*
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* Get GPIO Value
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* Arg0 - GPIO Number
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*/
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Method (GRXS, 1, Serialized)
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{
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OperationRegion (PREG, SystemMemory, GADD (Arg0), 4)
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Field (PREG, AnyAcc, NoLock, Preserve)
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{
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VAL0, 32
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}
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Local0 = (PAD_CFG0_RX_STATE & VAL0) >> PAD_CFG0_RX_STATE_BIT
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Return (Local0)
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}
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