eafcc8e5b1
All targets now use cbmem for the BERT region, so the implementation can be common. This also drops the obsolete comment about the need to have bert in a reserved region (cbmem gets fixed to be in a reserved region). Change-Id: I6f33d9e05a02492a1c91fb7af94aadaa9acd2931 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64602 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
49 lines
873 B
C
49 lines
873 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <amdblocks/smm.h>
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#include <assert.h>
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#include <stdint.h>
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#include <cpu/x86/msr.h>
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#include <cpu/x86/smm.h>
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#include <cpu/amd/msr.h>
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#include <cpu/amd/mtrr.h>
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#include <cbmem.h>
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#include <soc/northbridge.h>
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#include <soc/iomap.h>
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#include <amdblocks/biosram.h>
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void *cbmem_top_chipset(void)
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{
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msr_t tom = rdmsr(TOP_MEM);
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if (!tom.lo)
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return 0;
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/* 8MB alignment to keep MTRR usage low */
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return (void *)ALIGN_DOWN(restore_top_of_low_cacheable()
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- CONFIG_SMM_TSEG_SIZE, 8*MiB);
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}
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static uintptr_t smm_region_start(void)
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{
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return (uintptr_t)cbmem_top();
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}
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static size_t smm_region_size(void)
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{
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return CONFIG_SMM_TSEG_SIZE;
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}
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void smm_region(uintptr_t *start, size_t *size)
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{
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static int once;
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*start = smm_region_start();
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*size = smm_region_size();
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if (!once) {
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clear_tvalid();
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once = 1;
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}
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}
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