25b35d317e
- Enable LPC TPM support in Kconfig and add pc80/tpm to devicetree - Enable VBT support in Kconfig and add VBT files extracted from vendor firmware - Remove IGPU VBIOS entries from Kconfig - Remove unused PS2 definitions in superio.asl - Add PWRB ACPI device entry to mainboard.asl - Remove duplicate chipset register initialization from mainboard.c - Move ITE Super I/O configuration to mainboard_config_superio in romstage.c Signed-off-by: Alex James <theracermaster@gmail.com> Change-Id: I2d11c55dc809b920bccf55f5f745d9f29b18bbb6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/32752 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
35 lines
1.1 KiB
C
35 lines
1.1 KiB
C
/*
|
|
* This file is part of the coreboot project.
|
|
*
|
|
* Copyright (C) 2007-2009 coresystems GmbH
|
|
* Copyright (C) 2011-2012 Google Inc.
|
|
* Copyright (C) 2014 Vladimir Serbinenko
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License as published by
|
|
* the Free Software Foundation; version 2 of the License.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*/
|
|
|
|
#include <device/device.h>
|
|
#include <drivers/intel/gma/int15.h>
|
|
#include <southbridge/intel/bd82x6x/pch.h>
|
|
|
|
// mainboard_enable is executed as first thing after
|
|
// enumerate_buses().
|
|
|
|
static void mainboard_enable(struct device *dev)
|
|
{
|
|
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_NONE,
|
|
GMA_INT15_PANEL_FIT_DEFAULT,
|
|
GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
|
|
}
|
|
|
|
struct chip_operations mainboard_ops = {
|
|
.enable_dev = mainboard_enable
|
|
};
|