f0d150e0ba
We suspect that the code was stuck on init pllx (PLLX - acts as a clock source for the CPU cluster). So, remove the init call for pllx. This needs to be added later when required. Also, add a few more printks to display the progress. BUG=None BRANCH=None TEST=Compiles successfully for rush. Print messages seen on serial console. Original-Change-Id: I70e908a9ce1f3598d68bda68c0401a78834597d1 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/205680 Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> (cherry picked from commit d557d99edb855fbf7b32231c6746c676041bf62a) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Iaf56f2d587708c6e9fb01d4ced2edb5931075a81 Reviewed-on: http://review.coreboot.org/8571 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
70 lines
1.9 KiB
C
70 lines
1.9 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/exception.h>
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#include <arch/hlt.h>
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#include <bootblock_common.h>
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#include <cbfs.h>
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#include <console/console.h>
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#include <soc/clock.h>
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#include <soc/nvidia/tegra/apbmisc.h>
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#include "pinmux.h"
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#include "power.h"
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void main(void)
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{
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// enable pinmux clamp inputs
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clamp_tristate_inputs();
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// enable JTAG at the earliest stage
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enable_jtag();
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clock_early_uart();
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// Serial out, tristate off.
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pinmux_set_config(PINMUX_KB_ROW9_INDEX, PINMUX_KB_ROW9_FUNC_UA3);
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// Serial in, tristate_on.
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pinmux_set_config(PINMUX_KB_ROW10_INDEX, PINMUX_KB_ROW10_FUNC_UA3 |
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PINMUX_PULL_UP |
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PINMUX_INPUT_ENABLE);
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// Mux some pins away from uart A.
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pinmux_set_config(PINMUX_UART2_CTS_N_INDEX,
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PINMUX_UART2_CTS_N_FUNC_UB3 |
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PINMUX_INPUT_ENABLE);
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pinmux_set_config(PINMUX_UART2_RTS_N_INDEX,
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PINMUX_UART2_RTS_N_FUNC_UB3);
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if (CONFIG_BOOTBLOCK_CONSOLE) {
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console_init();
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exception_init();
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printk(BIOS_INFO, "T132: Bootblock here\n");
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}
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clock_init();
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printk(BIOS_INFO, "T132 bootblock: Clock init done\n");
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bootblock_mainboard_init();
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printk(BIOS_INFO, "T132 bootblock: Mainboard bootblock init done\n");
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while(1);
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}
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