Marshall Dawson f3c57a7c28 amd/stoneyridge: Put stage cache into TSEG ...

Add a function to allow an external region to be located in TSEG.
Select the option to use memory outside of cbmem.  Increase the size
reserved in TSEG.

Change-Id: Ic1073af04475d862753136c9e14e2b2dde31fe66
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/23519
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

2018-02-07 16:24:55 +00:00

..

amd

amd/stoneyridge: Put stage cache into TSEG

2018-02-07 16:24:55 +00:00

broadcom

soc: Add Kconfig for each soc vendor

2017-10-23 17:18:32 +00:00

dmp

DMP Vortex86ex board & chip: Remove - using LATE_CBMEM_INIT

2018-01-15 23:23:17 +00:00

imgtec

soc: Add Kconfig for each soc vendor

2017-10-23 17:18:32 +00:00

intel

soc/intel/cannonlake: Select SOC_AHCI_PORT_IMPLEMENTED_INVERT Kconfig for CNP-PCH

2018-02-07 08:09:24 +00:00

lowrisc

RISC-V boards: Stop using the config string

2017-11-07 12:31:00 +00:00

marvell

soc: Add Kconfig for each soc vendor

2017-10-23 17:18:32 +00:00

mediatek

soc/mediatek/mt8173: Remove cast of NULL* to void *

2017-11-03 16:03:30 +00:00

nvidia

soc: Add Kconfig for each soc vendor

2017-10-23 17:18:32 +00:00

qualcomm

soc: Add Kconfig for each soc vendor

2017-10-23 17:18:32 +00:00

rockchip

rockchip/rk3399: Pass coreboot table pointer to ARM TF

2018-02-02 22:19:26 +00:00

samsung

soc: Add Kconfig for each soc vendor

2017-10-23 17:18:32 +00:00

ucb

riscv: Remove config string support

2017-12-02 05:25:00 +00:00