Lee Leahy f67e2cf9cf arch/x86: Display MTRRs after MTRR update in postcar ...

Display the MTRRs after they have been updated during the postcar stage.

TEST=Build and run on Galileo Gen2

Change-Id: I1532250cacd363c1eeaf72edc6cb9e9268a11375
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15991
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

2016-08-01 20:36:20 +02:00

..

arm

src/arch: Capitalize CPU, RAM and ROM

2016-07-31 18:35:09 +02:00

arm64

arm64: Add stack dump to exception handler

2016-05-24 20:51:28 +02:00

mips

build system: remove CBFSTOOL_PRE1_OPTS

2016-05-03 11:40:49 +02:00

power8

region: Add writeat and eraseat support

2016-06-24 20:48:12 +02:00

riscv

arch/riscv: Refactor bootblock.S

2016-07-28 18:31:28 +02:00

x86

arch/x86: Display MTRRs after MTRR update in postcar

2016-08-01 20:36:20 +02:00