f727c7ce38
Testing: booted successfully. Change-Id: I003f6929b00476d46be931773cd35418fe6622a6 Signed-off-by: Hakim Giydan <hgiydan@marvell.com> Reviewed-on: https://review.coreboot.org/15529 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
67 lines
1.6 KiB
Makefile
67 lines
1.6 KiB
Makefile
##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2016 Marvell, Inc.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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ifeq ($(CONFIG_SOC_MARVELL_MVMAP2315),y)
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bootblock-y += a2bus.c
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bootblock-y += apmu.c
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bootblock-y += bootblock.c
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bootblock-y += bdb.c
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bootblock-y += clock.c
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bootblock-y += digest.c
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bootblock-y += fiq.S
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bootblock-y += gic.c
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bootblock-y += gpio.c
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bootblock-y += flash.c
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bootblock-y += load_validate.c
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bootblock-y += mcu.c
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bootblock-y += media.c
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bootblock-y += nvm.c
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bootblock-y += pinmux.c
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bootblock-y += pmic.c
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bootblock-y += reset.c
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bootblock-y += timer.c
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bootblock-y += sdram.c
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bootblock-y += uart.c
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bootblock-y += wdt.c
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ramstage-y += cbmem.c
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ramstage-y += media.c
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ramstage-y += gpio.c
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ramstage-y += ramstage_entry.S
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ramstage-y += reset.c
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ramstage-y += soc.c
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ramstage-y += timer.c
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ramstage-y += sdram.c
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ramstage-y += uart.c
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ramstage-y += wdt.c
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romstage-y += cbmem.c
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romstage-y += clock.c
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romstage-y += gpio.c
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romstage-y += media.c
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romstage-y += mmu_operations.c
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romstage-y += reset.c
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romstage-y += romstage_entry.S
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romstage-y += romstage.c
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romstage-y += sdram.c
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romstage-y += timer.c
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romstage-y += uart.c
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romstage-y += wdt.c
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CPPFLAGS_common += -Isrc/soc/marvell/mvmap2315/include/
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endif
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