These entries have no functional purpose, followup work will disallow chip entries that do not link in the respective driver. Change-Id: Ieab695022d0dd2f2671f9058db97bdd6fb29a10d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35102 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
87 lines
2.9 KiB
Plaintext
87 lines
2.9 KiB
Plaintext
#
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# This file is part of the coreboot project.
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#
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# Copyright (C) 2011 Advanced Micro Devices, Inc.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; version 2 of the License.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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chip northbridge/amd/agesa/family14/root_complex
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device cpu_cluster 0 on
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chip cpu/amd/agesa/family14
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device lapic 0 on end
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end
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end
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device domain 0 on
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subsystemid 0x1022 0x1510 inherit
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chip northbridge/amd/agesa/family14
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device pci 0.0 on end # Root Complex
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device pci 1.0 on end # Internal Graphics P2P bridge, 9802 to 9806
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device pci 1.1 on end # Internal HDMI Audio
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device pci 4.0 on end # PCIE P2P bridge MXM lane 0
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device pci 5.0 off end # PCIE P2P bridge MXM lane 1
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device pci 6.0 on end # PCIE P2P bridge LAN
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device pci 7.0 on end # PCIE P2P bridge MINIPCIE SLOT1
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device pci 8.0 off end # NB/SB Link P2P bridge
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end # agesa northbridge
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chip southbridge/amd/cimx/sb800
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device pci 11.0 on end # SATA
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device pci 12.0 on end # OHCI USB 0-4
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device pci 12.2 on end # EHCI USB 0-4
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device pci 13.0 on end # OHCI USB 5-9
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device pci 13.2 on end # EHCI USB 5-9
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device pci 14.0 on end # SM
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device pci 14.1 on end # IDE 0x439c
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device pci 14.2 on end # HDA 0x4383
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device pci 14.3 on # LPC 0x439d
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chip superio/smsc/kbc1100
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device pnp 2e.7 on # Keyboard
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io 0x60 = 0x60
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io 0x62 = 0x64
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irq 0x70 = 1
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irq 0x72 = 12
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end
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end # kbc1100
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end #LPC
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device pci 14.4 off end # PCIB 0x4384, NOTE: PCI interface pins shared with GPIO {GPIO 35:0}
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device pci 14.5 on end # OHCI FS/LS USB
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device pci 14.6 on end # Hudson-E1 GbE MAC: Broadcom BCM5785 (14E4:1699)
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device pci 15.0 on end # PCIe PortA Express Card
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device pci 15.1 on end # PCIe PortB NEC USB3.0
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device pci 15.2 on end # PCIe PortC MINIPCIE SLOT2
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device pci 15.3 on end # PCIe PortD PCIE X1 SLOT
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device pci 16.0 on end # OHCI USB 10-13
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device pci 16.2 on end # EHCI USB 10-13
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register "gpp_configuration" = "4" #1:1:1:1
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register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
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end #southbridge/amd/cimx/sb800
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chip northbridge/amd/agesa/family14
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# These seem unnecessary
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device pci 18.0 on end
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device pci 18.1 on end
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device pci 18.2 on end
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device pci 18.3 on end
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device pci 18.4 on end
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device pci 18.5 on end
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device pci 18.6 on end
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device pci 18.7 on end
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register "spdAddrLookup" = "
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{
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{ {0xA0, 0xA2}, {0x00, 0x00}, }, // socket 0 - Channel 0 & 1 - 8-bit SPD addresses
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}"
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end # agesa northbridge
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end #domain
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end #northbridge/amd/agesa/family14/root_complex
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