fb39f82116
Caching SPD data during startup requires additional CAR space. There was a large chunk of free space between the AP stack top and the BSP stack bottom; moving the AP stacks below the BSP stack allows this space to be utilized. TEST: Booted ASUS KGPE-D16 with dual Opteron 6129 processors (16 cores) and 120k of CAR. Change-Id: I370ff368affde7061d6547527bda058b9016e977 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/10404 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
36 lines
464 B
Plaintext
36 lines
464 B
Plaintext
config CPU_AMD_SOCKET_754
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bool
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if CPU_AMD_SOCKET_754
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config SOCKET_SPECIFIC_OPTIONS
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def_bool y
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select CPU_AMD_MODEL_FXX
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select X86_AMD_FIXED_MTRRS
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config CPU_ADDR_BITS
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int
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default 40
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config DCACHE_RAM_BASE
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hex
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default 0xc8000
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config DCACHE_RAM_SIZE
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hex
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default 0x08000
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config DCACHE_BSP_STACK_SIZE
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hex
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default 0x2000
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config DCACHE_BSP_STACK_SLUSH
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hex
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default 0x1000
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config DCACHE_AP_STACK_SIZE
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hex
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default 0x400
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endif # CPU_AMD_SOCKET_754
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