fbb46c5438
The EC values will be changed when entering S3, S4 or S5, so move the function that stores the current settings outside of logic that restricts it to S4 or S5. This means the state isn't lost when entering S3. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ia007a8ad9c08a309489e9f64f1ed311858bfcd10 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62741 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
138 lines
2.6 KiB
Plaintext
138 lines
2.6 KiB
Plaintext
/* SPDX-License-Identifier: GPL-2.0-only */
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Method (RPTS, 1, Serialized)
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{
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/* Store current EC settings in CMOS */
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Switch (ToInteger (\_SB.PCI0.LPCB.EC.ECRD (RefOf (\_SB.PCI0.LPCB.EC.TPLE))))
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{
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// 0x00 == Enabled == 0x00
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// 0x11 == Re-enabled == 0x00
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// 0x22 == Disabled == 0x01
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Case (0x00)
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{
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\_SB.PCI0.LPCB.TPLC = 0x00
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}
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Case (0x11)
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{
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\_SB.PCI0.LPCB.TPLC = 0x00
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}
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Case (0x22)
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{
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\_SB.PCI0.LPCB.TPLC = 0x01
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}
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}
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\_SB.PCI0.LPCB.FLKC =
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\_SB.PCI0.LPCB.EC.ECRD (RefOf (\_SB.PCI0.LPCB.EC.FLKE))
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Switch (ToInteger (\_SB.PCI0.LPCB.EC.ECRD (RefOf (\_SB.PCI0.LPCB.EC.KLSE))))
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{
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// 0x00 == Disabled == 0x00
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// 0xdd == Enabled == 0x01
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Case (0x00)
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{
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\_SB.PCI0.LPCB.KLSC = 0x00
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}
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Case (0xdd)
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{
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\_SB.PCI0.LPCB.KLSC = 0x01
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}
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}
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Switch (ToInteger (\_SB.PCI0.LPCB.EC.ECRD (RefOf (\_SB.PCI0.LPCB.EC.KLBE))))
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{
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// 0xdd == On == 0x00
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// 0xcc == Off == 0x01
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// 0xbb == Low == 0x02
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// 0xaa == High == 0x03
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Case (0xdd)
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{
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\_SB.PCI0.LPCB.KLBC = 0x00
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}
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Case (0xcc)
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{
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\_SB.PCI0.LPCB.KLBC = 0x01
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}
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Case (0xbb)
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{
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\_SB.PCI0.LPCB.KLBC = 0x02
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}
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Case (0xaa)
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{
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\_SB.PCI0.LPCB.KLBC = 0x03
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}
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}
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/*
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* Disable ACPI support.
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* This should always be the last action before entering S4 or S5.
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*/
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\_SB.PCI0.LPCB.EC.OSFG = 0x00
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}
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Method (RWAK, 1, Serialized)
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{
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/*
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* Enable ACPI support.
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* This should always be the first action when exiting S4 or S5.
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*/
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\_SB.PCI0.LPCB.EC.OSFG = 0x01
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/* Restore EC settings from CMOS */
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Switch (ToInteger (\_SB.PCI0.LPCB.TPLC))
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{
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// 0x00 == Enabled == 0x00
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// 0x00 == Re-enabled == 0x11
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// 0x01 == Disabled == 0x22
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Case (0x00)
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{
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\_SB.PCI0.LPCB.EC.ECWR (0x00, RefOf(\_SB.PCI0.LPCB.EC.TPLE))
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}
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Case (0x01)
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{
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\_SB.PCI0.LPCB.EC.ECWR (0x22, RefOf(\_SB.PCI0.LPCB.EC.TPLE))
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}
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}
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\_SB.PCI0.LPCB.EC.ECWR (\_SB.PCI0.LPCB.FLKC, RefOf(\_SB.PCI0.LPCB.EC.FLKE))
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Switch (ToInteger (\_SB.PCI0.LPCB.KLSC))
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{
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// 0x00 == Disabled == 0x00
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// 0x01 == Enabled == 0xdd
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Case (0x00)
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{
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\_SB.PCI0.LPCB.EC.ECWR (0x00, RefOf(\_SB.PCI0.LPCB.EC.KLSE))
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}
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Case (0x01)
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{
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\_SB.PCI0.LPCB.EC.ECWR (0xdd, RefOf(\_SB.PCI0.LPCB.EC.KLSE))
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}
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}
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Switch (ToInteger (\_SB.PCI0.LPCB.KLBC))
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{
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// 0x00 == On == 0xdd
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// 0x01 == Off == 0xcc
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// 0x02 == Low == 0xbb
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// 0x03 == High == 0xaa
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Case (0x00)
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{
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\_SB.PCI0.LPCB.EC.ECWR (0xdd, RefOf(\_SB.PCI0.LPCB.EC.KLBE))
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}
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Case (0x01)
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{
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\_SB.PCI0.LPCB.EC.ECWR (0xcc, RefOf(\_SB.PCI0.LPCB.EC.KLBE))
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}
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Case (0x02)
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{
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\_SB.PCI0.LPCB.EC.ECWR (0xbb, RefOf(\_SB.PCI0.LPCB.EC.KLBE))
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}
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Case (0x03)
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{
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\_SB.PCI0.LPCB.EC.ECWR (0xaa, RefOf(\_SB.PCI0.LPCB.EC.KLBE))
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}
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}
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}
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