ff744bf0ee
Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: Iee2056a50a1201626fa29194afdbfc1f11094420 Reviewed-on: https://review.coreboot.org/c/coreboot/+/36333 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
100 lines
2.8 KiB
C
100 lines
2.8 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2005 AMD
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* Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ops.h>
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#include <device/pci_ids.h>
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#include "bcm5785.h"
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void bcm5785_enable(struct device *dev)
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{
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struct device *sb_pci_main_dev;
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struct device *bus_dev;
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// unsigned index;
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/* See if we are on the behind the pcix bridge */
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bus_dev = dev->bus->dev;
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if ((bus_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) &&
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(bus_dev->device == 0x0036)) // device under PCI-X Bridge
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{
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unsigned int devfn;
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devfn = bus_dev->path.pci.devfn + (1 << 3);
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sb_pci_main_dev = pcidev_path_behind(bus_dev->bus, devfn);
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// index = ((dev->path.pci.devfn & ~7) >> 3) + 8;
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} else if ((bus_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) &&
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(bus_dev->device == 0x0104)) // device under PCI Bridge (under PCI-X)
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{
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unsigned int devfn;
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devfn = bus_dev->bus->dev->path.pci.devfn + (1 << 3);
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sb_pci_main_dev = pcidev_path_behind(bus_dev->bus->dev->bus,
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devfn);
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// index = ((dev->path.pci.devfn & ~7) >> 3) + 8;
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}
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else { // same bus
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unsigned int devfn;
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devfn = (dev->path.pci.devfn) & ~7;
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if (dev->vendor == PCI_VENDOR_ID_SERVERWORKS) {
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if (dev->device == 0x0036) //PCI-X Bridge
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{ devfn += (1<<3); }
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else if (dev->device == 0x0223) // USB
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{ devfn -= (1<<3); }
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}
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sb_pci_main_dev = pcidev_path_behind(dev->bus, devfn);
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// index = dev->path.pci.devfn & 7;
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}
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if (!sb_pci_main_dev) {
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return;
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}
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// get index now
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#if 0
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unsigned int reg_old, reg;
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if (index < 16) {
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reg = reg_old = pci_read_config16(sb_pci_main_dev, 0x48);
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reg &= ~(1 << index);
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if (dev->enabled) {
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reg |= (1 << index);
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}
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if (reg != reg_old) {
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pci_write_config16(sb_pci_main_dev, 0x48, reg);
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}
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}
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else if (index == 16) {
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reg = reg_old = pci_read_config8(sb_pci_main_dev, 0x47);
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reg &= ~(1 << 7);
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if (!dev->enabled) {
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reg |= (1 << 7);
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}
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if (reg != reg_old) {
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pci_write_config8(sb_pci_main_dev, 0x47, reg);
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}
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}
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#endif
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}
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void bcm5785_set_subsystem(struct device *dev, unsigned int vendor,
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unsigned int device)
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{
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pci_write_config32(dev, 0x40,
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((device & 0xffff) << 16) | (vendor & 0xffff));
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}
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struct chip_operations southbridge_broadcom_bcm5785_ops = {
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CHIP_NAME("Serverworks BCM5785 Southbridge")
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.enable_dev = bcm5785_enable,
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};
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